Re: APIC MSRs query

[Andrew Cooper <andrew.cooper3@citrix.com>]

On 17/05/11 14:43, Jan Beulich wrote:
>>>> On 17.05.11 at 15:25, Andrew Cooper<andrew.cooper3@citrix.com>  wrote:
>> Hello,
>>
>> I am currently cleaning up the APIC code for the sake of
>> shutdown/reboot/crashdump and have a query about the (modified for
>> brevity) snippet of code:
>>
>> uint64_t msr_content;
>> rdmsrl(MSR_IA32_APICBASE, msr_content);
>> msr_content |= MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD;
>> msr_content = (uint32_t)msr_content;
>> wrmsrl(MSR_IA32_APICBASE, msr_content);
>>
>> which is added into apic.c in changeset b622e411eef8, and has propagated
>> elsewhere in the codebase during subsequent cleanups etc.
>>
>> The MP spec and x2apic spec states that bits [35:12] of
>> MSR_IA32_APICBASE is the base APIC MMIO address.  Is there reason why
>> the code (almost always) clears the top 4 bits, or is it just an
>> overlooked mistake?
> I think this is a benign mistake. Benign because I don't think there is
> a meaningful (to Xen at least) number of systems that would not
> have their LAPIC at the default address (which fits in 32 bits).
>
> Jan
>
Ok - I will fix this up in my cleanup.

-- 
Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer
T: +44 (0)1223 225 900, http://www.citrix.com