From: Andy Lutomirski <luto@MIT.EDU>
To: Andi Kleen <andi@firstfloor.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 1/3] x86, intel: Output microcode revision v2
Date: Wed, 25 May 2011 19:58:26 -0400 [thread overview]
Message-ID: <4DDD97A2.5030304@mit.edu> (raw)
In-Reply-To: <1306351948-23382-1-git-send-email-andi@firstfloor.org>
On 05/25/2011 03:32 PM, Andi Kleen wrote:
> From: Andi Kleen<ak@linux.intel.com>
>
[...]
>
> I had to add a memory barrier to native_cpuid to prevent it being
> optimized away when the result is not used.
>
[...]
> @@ -179,7 +181,8 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
> "=b" (*ebx),
> "=c" (*ecx),
> "=d" (*edx)
> - : "0" (*eax), "2" (*ecx));
> + : "0" (*eax), "2" (*ecx)
> + : "memory");
> }
>
[...]
> + cpuid_eax(1);
I'm confused. Doesn't "asm volatile" (in native_cpuid) mean "don't
optimize me out"?
I can't reproduce the disappearance of the cpuid instruction when I
copied and pasted all the macros.
--Andy
next prev parent reply other threads:[~2011-05-25 23:58 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-25 19:32 [PATCH 1/3] x86, intel: Output microcode revision v2 Andi Kleen
2011-05-25 19:32 ` [PATCH 2/3] x86, intel: Use cpu_update for Atom errata check Andi Kleen
2011-05-26 7:39 ` Jean Delvare
2011-05-25 19:32 ` [PATCH 3/3] coretemp: Get microcode revision from cpu_data v2 Andi Kleen
2011-05-25 20:53 ` Jean Delvare
2011-05-26 2:08 ` Yu, Fenghua
2011-05-26 7:49 ` Jean Delvare
2011-05-25 19:52 ` [PATCH 1/3] x86, intel: Output microcode revision v2 Ingo Molnar
2011-05-25 20:06 ` Andi Kleen
2011-05-25 21:40 ` Thomas Gleixner
2011-05-25 23:58 ` Andy Lutomirski [this message]
2011-05-26 7:33 ` Jean Delvare
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