From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from plane.gmane.org ([80.91.229.3]:47243 "EHLO plane.gmane.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756994Ab1EaQR1 (ORCPT ); Tue, 31 May 2011 12:17:27 -0400 Received: from public by plane.gmane.org with local (Exim 4.69) (envelope-from ) id 1QRRdE-0004Zq-Nk for linux-wireless@vger.kernel.org; Tue, 31 May 2011 18:17:24 +0200 Message-ID: <4DE51487.1000808@lwfinger.net> (sfid-20110531_181731_156802_E2276B9C) Date: Tue, 31 May 2011 11:17:11 -0500 From: Larry Finger MIME-Version: 1.0 To: Andreas Schwab CC: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , =?UTF-8?B?TWljaGE=?= =?UTF-8?B?ZWwgQsO8c2No?= , public-linux-wireless-u79uwXL29TY76Z2rM5mHXA@plane.gmane.org, "John W. Linville" , public-b43-dev-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@plane.gmane.org, linuxppc-dev@ozlabs.org Subject: Re: [PATCH] ssb: pci: implement serdes workaround References: <1301657212-12126-1-git-send-email-zajec5@gmail.com> <4DE505C6.8020601@lwfinger.net> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Sender: linux-wireless-owner@vger.kernel.org List-ID: On 05/31/2011 10:54 AM, Andreas Schwab wrote: > Larry Finger writes: > >> From the traceback, it must be the serdes_pll_device read that failed. > > Why not ssb_pcicore_polarity_workaround (note r4 == 0x134)? Mainly because the last two steps in the traceback are [c2ca5c40] [f2146244] ssb_pcie_read+0x4c/0x54 [ssb] [c2ca5c50] [f2146440] ssb_pcicore_serdes_workaround+0x1c/0x170 [ssb] Larry From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yx0-f170.google.com (mail-yx0-f170.google.com [209.85.213.170]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id E7DCDB6F75 for ; Wed, 1 Jun 2011 02:17:17 +1000 (EST) Received: by yxi11 with SMTP id 11so2542316yxi.15 for ; Tue, 31 May 2011 09:17:14 -0700 (PDT) Sender: Larry Finger Message-ID: <4DE51487.1000808@lwfinger.net> Date: Tue, 31 May 2011 11:17:11 -0500 From: Larry Finger MIME-Version: 1.0 To: Andreas Schwab Subject: Re: [PATCH] ssb: pci: implement serdes workaround References: <1301657212-12126-1-git-send-email-zajec5@gmail.com> <4DE505C6.8020601@lwfinger.net> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Cc: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , =?UTF-8?B?TWljaGE=?= =?UTF-8?B?ZWwgQsO8c2No?= , public-b43-dev-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@plane.gmane.org, linuxppc-dev@ozlabs.org, "John W. Linville" , public-linux-wireless-u79uwXL29TY76Z2rM5mHXA@plane.gmane.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 05/31/2011 10:54 AM, Andreas Schwab wrote: > Larry Finger writes: > >> From the traceback, it must be the serdes_pll_device read that failed. > > Why not ssb_pcicore_polarity_workaround (note r4 == 0x134)? Mainly because the last two steps in the traceback are [c2ca5c40] [f2146244] ssb_pcie_read+0x4c/0x54 [ssb] [c2ca5c50] [f2146440] ssb_pcicore_serdes_workaround+0x1c/0x170 [ssb] Larry