From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Message-ID: <4DE53F57.2050402@mentor.com> Date: Tue, 31 May 2011 14:19:51 -0500 From: Meador Inge MIME-Version: 1.0 To: Scott Wood Subject: Re: [PATCH v2 1/2] powerpc: document the FSL MPIC message register binding References: <1305909399-26969-1-git-send-email-meador_inge@mentor.com> <1305909399-26969-2-git-send-email-meador_inge@mentor.com> <20110526150643.3e01f9a6@schlenkerla.am.freescale.net> In-Reply-To: <20110526150643.3e01f9a6@schlenkerla.am.freescale.net> Content-Type: text/plain; charset=ISO-8859-1 Cc: openmcapi-dev@googlegroups.com, Hollis Blanchard , devicetree-discuss@lists.ozlabs.org, linuxppc-dev@lists.ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 05/26/2011 03:06 PM, Scott Wood wrote: >> > + - interrupts: Specifies a list of interrupt source and level-sense pairs. >> > + The type shall be . The length shall be equal to >> > + the number of bits set in the 'msg-receive-mask' property value. > Oh, just noticed -- mismatch between msg-receive-mask here... > >> > + >> > +Optional properties: >> > + >> > + - mpic-msgr-receive-mask: Specifies what registers in the containing block >> > + are allowed to receive interrupts. The value is a bit mask where a set >> > + bit at bit 'n' indicates that message register 'n' can receive interrupts. >> > + The type shall be . If not present, then all of >> > + the message registers in the block are available. > ...and mpic-msgr-receive-mask here. > > Might want to just say "equal to the number of registers that are > available for receiving interrupts", to more clearly apply to the case where > mpic-msgr-receive-mask is missing. > Thanks; fixed. -- Meador Inge CodeSourcery / Mentor Embedded http://www.mentor.com/embedded-software From mboxrd@z Thu Jan 1 00:00:00 1970 From: Meador Inge Subject: Re: [PATCH v2 1/2] powerpc: document the FSL MPIC message register binding Date: Tue, 31 May 2011 14:19:51 -0500 Message-ID: <4DE53F57.2050402@mentor.com> References: <1305909399-26969-1-git-send-email-meador_inge@mentor.com> <1305909399-26969-2-git-send-email-meador_inge@mentor.com> <20110526150643.3e01f9a6@schlenkerla.am.freescale.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20110526150643.3e01f9a6-1MYqz8GpK7RekFaExTCHk1jVikpgYyvb5NbjCUgZEJk@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: Scott Wood Cc: openmcapi-dev-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Hollis Blanchard , devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org List-Id: devicetree@vger.kernel.org On 05/26/2011 03:06 PM, Scott Wood wrote: >> > + - interrupts: Specifies a list of interrupt source and level-sense pairs. >> > + The type shall be . The length shall be equal to >> > + the number of bits set in the 'msg-receive-mask' property value. > Oh, just noticed -- mismatch between msg-receive-mask here... > >> > + >> > +Optional properties: >> > + >> > + - mpic-msgr-receive-mask: Specifies what registers in the containing block >> > + are allowed to receive interrupts. The value is a bit mask where a set >> > + bit at bit 'n' indicates that message register 'n' can receive interrupts. >> > + The type shall be . If not present, then all of >> > + the message registers in the block are available. > ...and mpic-msgr-receive-mask here. > > Might want to just say "equal to the number of registers that are > available for receiving interrupts", to more clearly apply to the case where > mpic-msgr-receive-mask is missing. > Thanks; fixed. -- Meador Inge CodeSourcery / Mentor Embedded http://www.mentor.com/embedded-software