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Date: Thu, 30 Jun 2011 10:25:31 +0200
From: Fabien Chouteau <chouteau@adacore.com>
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Subject: Re: [Qemu-devel] [PATCH] Add e500 instructions dcblc,
 dcbtls and dcbtstl as no-op
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To: Scott Wood <scottwood@freescale.com>
Cc: qemu-devel@nongnu.org

On 28/06/2011 18:20, Scott Wood wrote:
> On Tue, 28 Jun 2011 10:17:39 +0200
> Fabien Chouteau <chouteau@adacore.com> wrote:
> 
>> On 27/06/2011 18:28, Scott Wood wrote:
>>> On Mon, 27 Jun 2011 15:15:55 +0200
>>> Fabien Chouteau <chouteau@adacore.com> wrote:
>>>
>>>> +/* dcbtls */
>>>> +static void gen_dcbtls(DisasContext *ctx)
>>>> +{
>>>> +    /* interpreted as no-op */
>>>> +}
>>>> +
>>>> +/* dcbtstls */
>>>> +static void gen_dcbtstls(DisasContext *ctx)
>>>> +{
>>>> +    /* interpreted as no-op */
>>>> +}
>>>
>>> Set L1CSR0[CUL] (unable to lock)?
>>
>> Why do you want to set this bit? Can't we consider that the instruction is
>> always effective?
> 
> But it's not.  Why claim it is, in the absence of some specific workload
> that needs to be fooled (which could take many different forms, not all of
> which are appropriate defaults)?

Reading the e500 manual again, it's not clear to me what can make the
L1CSR0[CUL] to be set. If you have a better understanding, can you please
explain?

-- 
Fabien Chouteau