From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jeroen Groenewegen van der Weyden <groen692@grosc.com>
Subject: Re: [PATCH 20 of 20] n2 MSR handling
	and	capability	exposure
Date: Mon, 04 Jul 2011 11:58:32 +0200
Message-ID: <4E118EC8.5030700@grosc.com>
References: <patchbomb.1307607905@nest-wsm.los-vmm.org>	<480cfcea095bddb2e7c4.1307607925@nest-wsm.los-vmm.org>	<20110613082700.GA17634@whitby.uk.xensource.com>	<1A42CE6F5F474C41B63392A5F80372B2562BF1EC@shsmsx501.ccr.corp.intel.com>	<20110615124527.GG17634@whitby.uk.xensource.com>	<4DFEE946.9070603@grosc.com>
	<4E0C84C8.1030804@grosc.com>	<20110701090145.GS9784@whitby.uk.xensource.com>	<4E0D9948.5000508@amd.com>
	<4E0D9D48.20308@grosc.com>
	<20110704085810.GZ17634@whitby.uk.xensource.com>
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You're testing on Intel hardware, right?

- Yes, the proc is a Xeon e5645. Two of them on a asus z8nr-d12 mobo.