From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52790) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QjZU2-00020K-IS for qemu-devel@nongnu.org; Wed, 20 Jul 2011 12:18:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QjZU0-0007cA-7m for qemu-devel@nongnu.org; Wed, 20 Jul 2011 12:18:50 -0400 Received: from thoth.sbs.de ([192.35.17.2]:22378) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QjZTz-0007c3-Fs for qemu-devel@nongnu.org; Wed, 20 Jul 2011 12:18:47 -0400 Message-ID: <4E26FFE3.5060909@siemens.com> Date: Wed, 20 Jul 2011 18:18:43 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <4E25F976.8010200@web.de> <20110720120027.GI3699@valinux.co.jp> <4E26C6C5.3060505@siemens.com> <4E26E5BC.6040508@siemens.com> <20110720161702.GL3699@valinux.co.jp> In-Reply-To: <20110720161702.GL3699@valinux.co.jp> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] pci: Length-align config space accesses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: Avi Kivity , qemu-devel , "Michael S. Tsirkin" On 2011-07-20 18:17, Isaku Yamahata wrote: > On Wed, Jul 20, 2011 at 04:27:08PM +0200, Jan Kiszka wrote: >> On 2011-07-20 14:15, Jan Kiszka wrote: >>> On 2011-07-20 14:00, Isaku Yamahata wrote: >>>> Hi. This clean up looks good basically. >>> >>> Oops, forgot to cc you. Sorry. >>> >>>> But when conventional pci device is accessed via MMCONFIG area, >>>> addr &= addr_mask doesn't work as expected. >>>> The config area of [256, 4K) of conventional pci should have no effect. >>> >>> Mmh, I see. Looks like we need to split accesses at this boundary and >>> executed them separately. >> >> Nope, no such issue: we already automatically split up accesses that >> span the legacy/extended boundary. Just like so far, legacy config space >> handlers have to filter out requests that address regions >= 256. > > For example, when accessing to offset 257 of conventional pci device, > the access is routed to offset 1 due to the masking. > Such overwrapping isn't correct. No, it isn't routed like that. The mask used via mmio is 0xfff. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux