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Date: Fri, 22 Jul 2011 16:10:45 +0200
From: Elie Richa <richa@adacore.com>
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Subject: Re: [Qemu-devel] [PATCH 08/23] PPC: Bump MPIC up to 32 supported
 CPUs
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To: Alexander Graf <agraf@suse.de>
Cc: Scott Wood <scottwood@freescale.com>, QEMU-devel Developers <qemu-devel@nongnu.org>


On 07/21/2011 03:27 AM, Alexander Graf wrote:
> @@ -1288,7 +1288,7 @@ static void mpic_reset (void *opaque)
>
>       mpp->glbc = 0x80000000;
>       /* Initialise controller registers */
> -    mpp->frep = 0x004f0002;
> +    mpp->frep = 0x004f0002 | ((MAX_CPU - 1)<<  8);

Should we really report the maximum supported number of CPUs or the actual number?
Several processor manuals state that it is the number of physically present CPUs 
that is reported (-1 of course).
In that case, the following would do?
        mpp->frep = 0x004f0002 | ((mpp->nb_cpus - 1)<<  8);

>       mpp->veni = VENI;
>       mpp->pint = 0x00000000;
>       mpp->spve = 0x0000FFFF;
> @@ -1685,10 +1685,6 @@ qemu_irq *mpic_init (target_phys_addr_t base, int nb_cpus,
>           {mpic_cpu_read, mpic_cpu_write, MPIC_CPU_REG_START, MPIC_CPU_REG_SIZE},
>       };
>
> -    /* XXX: for now, only one CPU is supported */
> -    if (nb_cpus != 1)
> -        return NULL;
> -
>       mpp = qemu_mallocz(sizeof(openpic_t));
>
>       for (i = 0; i<  sizeof(list)/sizeof(list[0]); i++) {