From: joravec@drewtech.com (Joey Oravec)
To: linux-arm-kernel@lists.infradead.org
Subject: plat-orion needs to enable PCIe ports for mv78xx0
Date: Wed, 17 Aug 2011 17:34:13 -0400 [thread overview]
Message-ID: <4E4C33D5.3050508@drewtech.com> (raw)
Orion maintainers,
On the Discovery series chips (mv78xx0), the CPU control and status
register at offset 0x20104 contains bits to enable / disable PCI express
port0 and port1. Both ports default to disabled.
It looks the PCIe driver and existing board setup files do not set this
bit; any boards that use PCIe and are working today might assume that
the bootloader has already set the bit to enable these ports. I couldn't
find anything in Marvell's documentation about timing, but the bits need
to be set a long time before you touch any of the PCIe port registers.
-joey
next reply other threads:[~2011-08-17 21:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-17 21:34 Joey Oravec [this message]
2011-08-22 14:21 ` plat-orion needs to enable PCIe ports for mv78xx0 Lennert Buytenhek
2011-08-22 23:45 ` Lennert Buytenhek
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