From: Mark Cave-Ayland <mark.cave-ayland@siriusit.co.uk>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] sparc32_dma: correctly initialize ledma base address
Date: Fri, 19 Aug 2011 21:52:26 +0100 [thread overview]
Message-ID: <4E4ECD0A.70207@siriusit.co.uk> (raw)
In-Reply-To: <4E493D74.6020303@mc.net>
On 15/08/11 16:38, Bob Breuer wrote:
> Depends on the rom. The SS-5 rom always sets it correctly, whereas the
> SS-20 rom only sets it when you do "boot net". Also, this is just the
> top 8 bits of the address. The DMA2 documentation[1] for E_BASE_ADDR
> states that these upper address bits default to 0xff, even though it
> seems to incorrectly define it as bits 7:0 in the register instead of
> 31:24.
Nice one - looks like I missed this when reading the documentation. At
least the choice of default address now makes sense.
> If you follow Artyom's blog, at [2] it was assumed that the bogus dbri
> device was the culprit (which is also why I went down the path of
> implementing the dbri device), when in reality, the selftest failure
> was preventing "boot net" from running and fixing the ledma register
> settings.
Okay - I think I see ;) In that case, I'd say this patch should be
applied if Blue hasn't already done it (*sigh* I really miss the git web
interface on qemu.org).
ATB,
Mark.
--
Mark Cave-Ayland - Senior Technical Architect
PostgreSQL - PostGIS
Sirius Corporation plc - control through freedom
http://www.siriusit.co.uk
t: +44 870 608 0063
Sirius Labs: http://www.siriusit.co.uk/labs
next prev parent reply other threads:[~2011-08-19 20:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-11 16:11 [Qemu-devel] sparc32_dma: correctly initialize ledma base address Bob Breuer
2011-08-15 10:14 ` Mark Cave-Ayland
2011-08-15 15:38 ` Bob Breuer
2011-08-19 20:52 ` Mark Cave-Ayland [this message]
2011-08-20 5:04 ` Bob Breuer
2011-08-20 7:09 ` Blue Swirl
2011-08-26 9:54 ` Artyom Tarasenko
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