diff for duplicates of <4E546672.3070100@freescale.com> diff --git a/a/1.txt b/N1/1.txt index afd3880..ecd43ee 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,41 +1,56 @@ -于 2011年08月23日 18:02, Matthieu CASTET 写道: -> LiuShuo a écrit : ->> 于 2011年08月19日 00:25, Scott Wood 写道: +=E4=BA=8E 2011=E5=B9=B408=E6=9C=8823=E6=97=A5 18:02, Matthieu CASTET =E5=86= +=99=E9=81=93: +> LiuShuo a =C3=A9crit : +>> =E4=BA=8E 2011=E5=B9=B408=E6=9C=8819=E6=97=A5 00:25, Scott Wood =E5=86= +=99=E9=81=93: >>> On 08/17/2011 09:33 PM, b35362@freescale.com wrote: >>>> From: Liu Shuo<b35362@freescale.com> >>>> ->>>> Freescale FCM controller has a 2K size limitation of buffer RAM. In order ->>>> to support the Nand flash chip whose page size is larger than 2K bytes, ->>>> we divide a page into multi-2K pages for MTD layer driver. In that case, ->>>> we force to set the page size to 2K bytes. We convert the page address of ->>>> MTD layer driver to a real page address in flash chips and a column index ->>>> in fsl_elbc driver. We can issue any column address by UA instruction of +>>>> Freescale FCM controller has a 2K size limitation of buffer RAM. In = +order +>>>> to support the Nand flash chip whose page size is larger than 2K byt= +es, +>>>> we divide a page into multi-2K pages for MTD layer driver. In that c= +ase, +>>>> we force to set the page size to 2K bytes. We convert the page addre= +ss of +>>>> MTD layer driver to a real page address in flash chips and a column = +index +>>>> in fsl_elbc driver. We can issue any column address by UA instructio= +n of >>>> elbc controller. >>>> ->>>> NOTE: Due to there is a limitation of 'Number of Partial Program Cycles in ->>>> the Same Page (NOP)', the flash chip which is supported by this workaround +>>>> NOTE: Due to there is a limitation of 'Number of Partial Program Cyc= +les in +>>>> the Same Page (NOP)', the flash chip which is supported by this work= +around >>>> have to meet below conditions. >>>> 1. page size is not greater than 4KB >>>> 2. 1) if main area and spare area have independent NOPs: ->>>> main area NOP :>=3 ->>>> spare area NOP :>=2? +>>>> main area NOP :>=3D3 +>>>> spare area NOP :>=3D2? >>> How often are the NOPs split like this? >>> >>>> 2) if main area and spare area have a common NOP: ->>>> NOP :>=4 ->>> This depends on how the flash is used. If you treat it as a NOP1 flash ->>> (e.g. run ubifs rather than jffs2), then you need NOP2 for a 4K chip and ->>> NOP4 for an 8K chip. OTOH, if you would be making full use of NOP4 on a +>>>> NOP :>=3D4 +>>> This depends on how the flash is used. If you treat it as a NOP1 fla= +sh +>>> (e.g. run ubifs rather than jffs2), then you need NOP2 for a 4K chip = +and +>>> NOP4 for an 8K chip. OTOH, if you would be making full use of NOP4 o= +n a >>> real 2K chip, you'll need NOP8 for a 4K chip. >>> ->>> The NOP restrictions should be documented in the code itself, not just ->>> in the git changelog. Maybe print it to the console when this hack is +>>> The NOP restrictions should be documented in the code itself, not jus= +t +>>> in the git changelog. Maybe print it to the console when this hack i= +s >>> used, along with the NOP value read from the ID. >> We can't read the NOP from the ID on any chip. Some chips don't >> give this infomation.(e.g. Micron MT29F4G08BAC) > Doesn't the micron chip provide it with onfi info ? Sorry, there is something wrong with my expression. -We can get the NOP info from datasheet, but can't get it by READID +We can get the NOP info from datasheet, but can't get it by READID=20 command in code. -LiuShuo diff --git a/a/content_digest b/N1/content_digest index 4c16d4b..01ca7ff 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -13,48 +13,63 @@ " linux-mtd@lists.infradead.org <linux-mtd@lists.infradead.org>\0" "\00:1\0" "b\0" - "\344\272\216 2011\345\271\26408\346\234\21023\346\227\245 18:02, Matthieu CASTET \345\206\231\351\201\223:\n" - "> LiuShuo a \303\251crit :\n" - ">> \344\272\216 2011\345\271\26408\346\234\21019\346\227\245 00:25, Scott Wood \345\206\231\351\201\223:\n" + "=E4=BA=8E 2011=E5=B9=B408=E6=9C=8823=E6=97=A5 18:02, Matthieu CASTET =E5=86=\n" + "=99=E9=81=93:\n" + "> LiuShuo a =C3=A9crit :\n" + ">> =E4=BA=8E 2011=E5=B9=B408=E6=9C=8819=E6=97=A5 00:25, Scott Wood =E5=86=\n" + "=99=E9=81=93:\n" ">>> On 08/17/2011 09:33 PM, b35362@freescale.com wrote:\n" ">>>> From: Liu Shuo<b35362@freescale.com>\n" ">>>>\n" - ">>>> Freescale FCM controller has a 2K size limitation of buffer RAM. In order\n" - ">>>> to support the Nand flash chip whose page size is larger than 2K bytes,\n" - ">>>> we divide a page into multi-2K pages for MTD layer driver. In that case,\n" - ">>>> we force to set the page size to 2K bytes. We convert the page address of\n" - ">>>> MTD layer driver to a real page address in flash chips and a column index\n" - ">>>> in fsl_elbc driver. We can issue any column address by UA instruction of\n" + ">>>> Freescale FCM controller has a 2K size limitation of buffer RAM. In =\n" + "order\n" + ">>>> to support the Nand flash chip whose page size is larger than 2K byt=\n" + "es,\n" + ">>>> we divide a page into multi-2K pages for MTD layer driver. In that c=\n" + "ase,\n" + ">>>> we force to set the page size to 2K bytes. We convert the page addre=\n" + "ss of\n" + ">>>> MTD layer driver to a real page address in flash chips and a column =\n" + "index\n" + ">>>> in fsl_elbc driver. We can issue any column address by UA instructio=\n" + "n of\n" ">>>> elbc controller.\n" ">>>>\n" - ">>>> NOTE: Due to there is a limitation of 'Number of Partial Program Cycles in\n" - ">>>> the Same Page (NOP)', the flash chip which is supported by this workaround\n" + ">>>> NOTE: Due to there is a limitation of 'Number of Partial Program Cyc=\n" + "les in\n" + ">>>> the Same Page (NOP)', the flash chip which is supported by this work=\n" + "around\n" ">>>> have to meet below conditions.\n" ">>>> \t1. page size is not greater than 4KB\n" ">>>> \t2.\t1) if main area and spare area have independent NOPs:\n" - ">>>> \t\t\t main area NOP :>=3\n" - ">>>> \t\t\t spare area NOP :>=2?\n" + ">>>> \t\t\t main area NOP :>=3D3\n" + ">>>> \t\t\t spare area NOP :>=3D2?\n" ">>> How often are the NOPs split like this?\n" ">>>\n" ">>>> \t\t2) if main area and spare area have a common NOP:\n" - ">>>> \t\t\t NOP :>=4\n" - ">>> This depends on how the flash is used. If you treat it as a NOP1 flash\n" - ">>> (e.g. run ubifs rather than jffs2), then you need NOP2 for a 4K chip and\n" - ">>> NOP4 for an 8K chip. OTOH, if you would be making full use of NOP4 on a\n" + ">>>> \t\t\t NOP :>=3D4\n" + ">>> This depends on how the flash is used. If you treat it as a NOP1 fla=\n" + "sh\n" + ">>> (e.g. run ubifs rather than jffs2), then you need NOP2 for a 4K chip =\n" + "and\n" + ">>> NOP4 for an 8K chip. OTOH, if you would be making full use of NOP4 o=\n" + "n a\n" ">>> real 2K chip, you'll need NOP8 for a 4K chip.\n" ">>>\n" - ">>> The NOP restrictions should be documented in the code itself, not just\n" - ">>> in the git changelog. Maybe print it to the console when this hack is\n" + ">>> The NOP restrictions should be documented in the code itself, not jus=\n" + "t\n" + ">>> in the git changelog. Maybe print it to the console when this hack i=\n" + "s\n" ">>> used, along with the NOP value read from the ID.\n" ">> We can't read the NOP from the ID on any chip. Some chips don't\n" ">> give this infomation.(e.g. Micron MT29F4G08BAC)\n" "> Doesn't the micron chip provide it with onfi info ?\n" "Sorry, there is something wrong with my expression.\n" - "We can get the NOP info from datasheet, but can't get it by READID \n" + "We can get the NOP info from datasheet, but can't get it by READID=20\n" "command in code.\n" "\n" "-LiuShuo\n" "> Matthieu\n" > -1378d4bdfcc6d6e247b326a936f1db822498c3ec5da6c23875c77e8a9c4bb356 +6e0aa0c191cc8323a9ff3e2aebfe9483a7caaeabf41dffdc145b3f2ddf1f5176
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