Re: [PATCH 3/3] ARM: EXYNOS4: Add support for 8-bit bus width in SDHCI for ORIGEN

[Tushar Behera <tushar.behera@linaro.org>]

Hi Kukjin,

On Wednesday 31 August 2011 06:31 AM, Kukjin Kim wrote:
> Tushar Behera wrote:
>>
>> Platform data for SDHCI controller on ORIGEN board is missing the
>> support for 8-bit bus width. The platform data is extended in sync
>> with other EXYNOS4 machines.
>>
>> Signed-off-by: Tushar Behera<tushar.behera@linaro.org>
>> ---
>>   arch/arm/mach-exynos4/mach-origen.c |    8 ++++++++
>>   1 files changed, 8 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos4/mach-origen.c
> b/arch/arm/mach-exynos4/mach-
>> origen.c
>> index ae18812..6b6cd77 100644
>> --- a/arch/arm/mach-exynos4/mach-origen.c
>> +++ b/arch/arm/mach-exynos4/mach-origen.c
>> @@ -75,11 +75,19 @@ static struct s3c2410_uartcfg origen_uartcfgs[]
> __initdata =
>> {
>>   static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
>>   	.cd_type		= S3C_SDHCI_CD_INTERNAL,
>>   	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
>> +#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
>> +	.max_width		= 8,
>> +	.host_caps		= MMC_CAP_8_BIT_DATA,
>> +#endif
>>   };
>>
>>   static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
>>   	.cd_type		= S3C_SDHCI_CD_INTERNAL,
>>   	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
>> +#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
>> +	.max_width		= 8,
>> +	.host_caps		= MMC_CAP_8_BIT_DATA,
>> +#endif
>>   };
>>
>>   static struct platform_device *origen_devices[] __initdata = {
>> --
>> 1.7.4.1
>
> Hi Tushar,
>
> I wonder the bus width of SDHCI controller can be changed manually on ORIGEN
> like SMDK board.
>
I will do further test and update you about the results.

> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim<kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>


-- 
Tushar Behera