From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeni Dodonov Subject: Re: [PATCH] drm/i915: Separate fence pin counting from normal bind pin counting Date: Fri, 02 Sep 2011 15:43:51 -0300 Message-ID: <4E6123E7.5070804@dodonov.net> References: <20110605205529.GA2691@phenom.ffwll.local> <1307340601-32259-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-gy0-f177.google.com (mail-gy0-f177.google.com [209.85.160.177]) by gabe.freedesktop.org (Postfix) with ESMTP id B1C1F9E75B for ; Fri, 2 Sep 2011 11:44:17 -0700 (PDT) Received: by gyh20 with SMTP id 20so2426849gyh.36 for ; Fri, 02 Sep 2011 11:44:17 -0700 (PDT) In-Reply-To: <1307340601-32259-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 06/06/2011 03:10 AM, Chris Wilson wrote: > In order to correctly account for reserving space in the GTT and fences > for a batch buffer, we need to independently track whether the fence is > pinned due to a fenced GPU access in the batch from from whether the > buffer is pinned in the aperture. Currently we count the fenced as > pinned if the buffer has already been seen in the execbuffer. This leads > to a false accounting of available fence registers, causing frequent > mass evictions. Worse, if coupled with the change to make > i915_gem_object_get_fence() report EDEADLK upon fence starvation, the > batchbuffer can fail with only one fence required... > > In order to trigger the false accounting, one can simply submit two > batches containing the same 18 [2*(num_avail_fences+1)] buffers. In the > first batch, the first 9 buffers require a fence. In the second batch, > the latter half require a fence. Due to prior pinning of all buffers, > which also then pins the fence register, this results in the false > starvation and forced eviction of the currently active buffers. > Admittedly, such batch buffers require pipelined fencing... > > Note, this fixes a severe performance regression with heavy fenced BLT > users such as the Cairo traces firefox-planet-gnome and midori-zoomed on > gen3. > > Signed-off-by: Chris Wilson > Cc: Daniel Vetter > Reviewed-by: Daniel Vetter > --- > drivers/gpu/drm/i915/i915_drv.h | 21 ++++ > drivers/gpu/drm/i915/i915_gem.c | 7 +- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 161 +++++++++++++++++++--------- > drivers/gpu/drm/i915/intel_display.c | 21 +++- > 4 files changed, 155 insertions(+), 55 deletions(-) > Bringing back this June's thread to live, I noticed that this patch never made it to the kernel.. is anything still pending on it by a chance, or it was just MIA? -- Eugeni Dodonov