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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: [PATCH 3 of 3] IRQ: Introduce old_vector to irq_cfg v2
Date: Mon, 5 Sep 2011 14:17:21 +0100	[thread overview]
Message-ID: <4E64CBE1.8010502@citrix.com> (raw)
In-Reply-To: <1315223127.5679.9118.camel@elijah>

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IRQ: Introduce old_vector to irq_cfg v2

Introduce old_vector to irq_cfg with the same principle as
old_cpu_mask.  This removes a brute force loop from
__clear_irq_vector(), and paves the way to correct bitrotten logic
elsewhere in the irq code.

Changes:
 * Make use of IRQ_VECTOR_UNASSIGNED instead of -1 for consistency
 * Correct logic in __clear_irq_vector(): should clean up
   cfg->old_vector rather than cfg->vector which has already been
   cleaned up

Signed-off-by Andrew Cooper <andrew.cooper3@citrix.com>

-- 
Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer
T: +44 (0)1223 225 900, http://www.citrix.com


[-- Attachment #2: irq-introduce-old_vector-to-irq_cfg.patch --]
[-- Type: text/x-patch, Size: 4189 bytes --]

IRQ: Introduce old_vector to irq_cfg v2

Introduce old_vector to irq_cfg with the same principle as
old_cpu_mask.  This removes a brute force loop from
__clear_irq_vector(), and paves the way to correct bitrotten logic
elsewhere in the irq code.

Changes:
 * Make use of IRQ_VECTOR_UNASSIGNED instead of -1 for consistency
 * Correct logic in __clear_irq_vector(): should clean up
   cfg->old_vector rather than cfg->vector which has already been
   cleaned up

Signed-off-by Andrew Cooper <andrew.cooper3@citrix.com>

diff -r cf93a1825d66 xen/arch/x86/io_apic.c
--- a/xen/arch/x86/io_apic.c	Fri Sep 02 17:33:17 2011 +0100
+++ b/xen/arch/x86/io_apic.c	Mon Sep 05 14:12:59 2011 +0100
@@ -487,11 +487,16 @@ fastcall void smp_irq_move_cleanup_inter
         __get_cpu_var(vector_irq)[vector] = -1;
         cfg->move_cleanup_count--;
 
-        if ( cfg->move_cleanup_count == 0 
-             &&  cfg->used_vectors )
+        if ( cfg->move_cleanup_count == 0 )
         {
-            ASSERT(test_bit(vector, cfg->used_vectors));
-            clear_bit(vector, cfg->used_vectors);
+            cfg->old_vector = IRQ_VECTOR_UNASSIGNED;
+            cpus_clear(cfg->old_cpu_mask);
+
+            if ( cfg->used_vectors )
+            {
+                ASSERT(test_bit(vector, cfg->used_vectors));
+                clear_bit(vector, cfg->used_vectors);
+            }
         }
 unlock:
         spin_unlock(&desc->lock);
diff -r cf93a1825d66 xen/arch/x86/irq.c
--- a/xen/arch/x86/irq.c	Fri Sep 02 17:33:17 2011 +0100
+++ b/xen/arch/x86/irq.c	Mon Sep 05 14:12:59 2011 +0100
@@ -39,8 +39,6 @@ boolean_param("irq-perdev-vector-map", o
 u8 __read_mostly *irq_vector;
 struct irq_desc __read_mostly *irq_desc = NULL;
 
-#define IRQ_VECTOR_UNASSIGNED (0)
-
 static DECLARE_BITMAP(used_vectors, NR_VECTORS);
 
 struct irq_cfg __read_mostly *irq_cfg = NULL;
@@ -211,15 +209,9 @@ static void __clear_irq_vector(int irq)
 
     cpus_and(tmp_mask, cfg->old_cpu_mask, cpu_online_map);
     for_each_cpu_mask(cpu, tmp_mask) {
-        for (vector = FIRST_DYNAMIC_VECTOR; vector <= LAST_DYNAMIC_VECTOR;
-                                vector++) {
-            if (per_cpu(vector_irq, cpu)[vector] != irq)
-                continue;
-            TRACE_3D(TRC_HW_IRQ_MOVE_FINISH,
-                     irq, vector, cpu);
-            per_cpu(vector_irq, cpu)[vector] = -1;
-             break;
-        }
+        ASSERT( per_cpu(vector_irq, cpu)[cfg->old_vector] == irq );
+        TRACE_3D(TRC_HW_IRQ_MOVE_FINISH, irq, vector, cpu);
+        per_cpu(vector_irq, cpu)[cfg->old_vector] = -1;
      }
 
     if ( cfg->used_vectors )
@@ -229,6 +221,8 @@ static void __clear_irq_vector(int irq)
     }
 
     cfg->move_in_progress = 0;
+    cfg->old_vector = IRQ_VECTOR_UNASSIGNED;
+    cpus_clear(cfg->old_cpu_mask);
 }
 
 void clear_irq_vector(int irq)
@@ -279,6 +273,7 @@ static void __init init_one_irq_desc(str
 static void __init init_one_irq_cfg(struct irq_cfg *cfg)
 {
     cfg->vector = IRQ_VECTOR_UNASSIGNED;
+    cfg->old_vector = IRQ_VECTOR_UNASSIGNED;
     cpus_clear(cfg->cpu_mask);
     cpus_clear(cfg->old_cpu_mask);
     cfg->used_vectors = NULL;
@@ -418,6 +413,7 @@ next:
         if (old_vector) {
             cfg->move_in_progress = 1;
             cpus_copy(cfg->old_cpu_mask, cfg->cpu_mask);
+            cfg->old_vector = cfg->vector;
         }
         trace_irq_mask(TRC_HW_IRQ_ASSIGN_VECTOR, irq, vector, &tmp_mask);
         for_each_cpu_mask(new_cpu, tmp_mask)
diff -r cf93a1825d66 xen/include/asm-x86/irq.h
--- a/xen/include/asm-x86/irq.h	Fri Sep 02 17:33:17 2011 +0100
+++ b/xen/include/asm-x86/irq.h	Mon Sep 05 14:12:59 2011 +0100
@@ -28,7 +28,8 @@ typedef struct {
 } vmask_t;
 
 struct irq_cfg {
-        int  vector;
+        s16 vector;                  /* vector itself is only 8 bits, */
+        s16 old_vector;              /* but we use -1 for unassigned  */
         cpumask_t cpu_mask;
         cpumask_t old_cpu_mask;
         unsigned move_cleanup_count;
@@ -41,6 +42,8 @@ struct irq_cfg {
 #define IRQ_UNUSED      (0)
 #define IRQ_USED        (1)
 
+#define IRQ_VECTOR_UNASSIGNED (-1)
+
 extern struct irq_cfg *irq_cfg;
 
 typedef int vector_irq_t[NR_VECTORS];

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      reply	other threads:[~2011-09-05 13:17 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-02 16:35 [PATCH 0 of 3] IRQ: Part 1 of the irq code cleanup Andrew Cooper
2011-09-02 16:35 ` [PATCH 1 of 3] IRQ: Remove bit-rotten code Andrew Cooper
2011-09-05 10:10   ` George Dunlap
2011-09-02 16:35 ` [PATCH 2 of 3] IRQ: Fold irq_status into irq_cfg Andrew Cooper
2011-09-02 16:35 ` [PATCH 3 of 3] IRQ: Introduce old_vector to irq_cfg Andrew Cooper
2011-09-05 10:14   ` George Dunlap
2011-09-05 11:43     ` Andrew Cooper
2011-09-05 11:45       ` George Dunlap
2011-09-05 13:17         ` Andrew Cooper [this message]

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