From: santosh.shilimkar@ti.com (Santosh)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: EXYNOS4: Enable double linefill in PL310 Prefetch Control Register
Date: Wed, 14 Sep 2011 11:43:26 +0530 [thread overview]
Message-ID: <4E704606.6040606@ti.com> (raw)
In-Reply-To: <CAH9JG2VFSwL7hCmGpHXx_UKKwK3dbhNRGQB1bwvcD-YC1Qj-AQ@mail.gmail.com>
On Wednesday 14 September 2011 11:38 AM, Kyungmin Park wrote:
> Hi Siarhei,
>
> Interesting feature, and it's not samsung soc issue, so add the arm
> mailing list.
> It checked and the see the read performance improvement from 868MiB/s
> to 981MiB/s with lmbench.
> It's helpful to test other SoC., e.g., OMAP4, STE and so on.
>
> BTW, why do you set the 27-bit? In my PL310 Spec., it's reserved bit
> and should be zero (SBZ).
>
That's because not all PL310 versions double line fill.
Regards
santosh
next prev parent reply other threads:[~2011-09-14 6:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1315894031-9579-1-git-send-email-siarhei.siamashka@gmail.com>
2011-09-14 6:08 ` [PATCH] ARM: EXYNOS4: Enable double linefill in PL310 Prefetch Control Register Kyungmin Park
2011-09-14 6:13 ` Santosh [this message]
2011-09-14 7:43 ` Siarhei Siamashka
2011-09-14 7:57 ` Kyungmin Park
2011-09-14 8:20 ` Siarhei Siamashka
2011-09-14 11:23 ` Kukjin Kim
2011-09-14 21:22 ` Siarhei Siamashka
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