From: David Daney <david.s.daney@gmail.com>
To: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>, ralf@linux-mips.org
Cc: David Daney <david.daney@cavium.com>,
linux-mips@linux-mips.org,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@elte.hu>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Dezhong Diao <dediao@cisco.com>, Gabor Juhos <juhosg@openwrt.org>
Subject: Re: [PATCH v5 3/5] MIPS: perf: Reorganize contents of perf support files.
Date: Sat, 24 Sep 2011 13:44:00 -0700 [thread overview]
Message-ID: <4E7E4110.40603@gmail.com> (raw)
In-Reply-To: <CAOfQC98+G6Ar8RAT8697GS3MMhEQH86WSyrGjPAo4ELMCWzJHw@mail.gmail.com>
On 09/23/2011 07:50 PM, Deng-Cheng Zhu wrote:
> 2011/9/23 David Daney<david.daney@cavium.com>
>> The contents of arch/mips/kernel/perf_event.c and
>> arch/mips/kernel/perf_event_mipsxx.c were divided in a seemingly ad
>> hoc manner, with the first including the second.
>>
>> I moved all the hardware counter support code to perf_event_mipsxx.c
>> and removed the gating #ifdefs to the Kconfig and Makefile.
>>
>> Now perf_event.c contains only the callchain support, everything else
>> is in perf_event_mipsxx.c
>>
> Sorry for my late comment. I personally don't think it's a bad idea to
> use the original gating #ifdefs, because it allows sharing common code
> among different types of MIPS PMUs. Also, using CPU types as compiling
> conditions seems make sense. If you move the common hunk to
> perf_event_mipsxx.c, other CPUs like loognson series will have to duplicate
> these stuff.
>
I disagree, and here is why:
Almost all the the code is mipsxx specific.
If Loongson has a PMU that can reuse this code, it can just be added to
perf_event_mipsxx.c along with all the other mips compatible PMUs
If this is not feasible, then it can have its own file and and common
code can be removed to a common place at that time.
In any event, I have not seen any Loongson PMU patches, if someone has
such patches I would be happy to consider changes that would make the
kernel as a whole cleaner. But preventing cleanup and removal of a ton
of #ifdefery in hope that Loongson patches may someday want something
different is not what I would call a good way forward.
David Daney
> Deng-Cheng
>
next prev parent reply other threads:[~2011-09-24 20:44 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-22 17:26 [PATCH v5 0/5] MIPS: perf: Add support for 64-bit MIPS hardware counters David Daney
2011-09-22 17:26 ` [PATCH v5 1/5] MIPS: Add accessor macros for 64-bit performance counter registers David Daney
2011-09-24 0:19 ` Ralf Baechle
2011-09-22 17:26 ` [PATCH 2/2] MIPS: Add probes for more Octeon II CPUs David Daney
2011-09-22 17:30 ` David Daney
2011-09-22 17:26 ` [PATCH v5 3/5] MIPS: perf: Reorganize contents of perf support files David Daney
2011-09-24 0:19 ` Ralf Baechle
2011-09-24 2:50 ` Deng-Cheng Zhu
2011-09-24 20:44 ` David Daney [this message]
2011-09-26 9:12 ` Deng-Cheng Zhu
2011-09-22 17:26 ` [PATCH v5 4/5] MIPS: perf: Add support for 64-bit perf counters David Daney
2011-09-24 0:20 ` Ralf Baechle
2011-09-24 2:54 ` Deng-Cheng Zhu
2011-09-24 20:57 ` David Daney
2011-09-26 9:07 ` Deng-Cheng Zhu
2011-09-22 17:26 ` [PATCH v5 5/5] MIPS: perf: Add Octeon support for hardware perf David Daney
2011-09-24 0:20 ` Ralf Baechle
2011-09-22 17:32 ` [PATCH v5 2/5] MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c David Daney
2011-09-24 0:19 ` Ralf Baechle
2011-09-24 2:48 ` Deng-Cheng Zhu
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