From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:36784) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8EYv-00085W-Q7 for qemu-devel@nongnu.org; Mon, 26 Sep 2011 13:01:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R8EYu-0006jQ-L5 for qemu-devel@nongnu.org; Mon, 26 Sep 2011 13:01:49 -0400 Received: from david.siemens.de ([192.35.17.14]:15756) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8EYu-0006j5-3F for qemu-devel@nongnu.org; Mon, 26 Sep 2011 13:01:48 -0400 Message-ID: <4E80AFF8.8000107@siemens.com> Date: Mon, 26 Sep 2011 19:01:44 +0200 From: Jan Kiszka MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 1/2] pcnet: Move BCR defines to header List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-devel This moves BCR defines to the common header and immediately makes use of them to add BCR_APROMWE, replacing the open-coded write check in pcnet_aprom_writeb. Signed-off-by: Jan Kiszka --- hw/pcnet-pci.c | 4 ++-- hw/pcnet.c | 18 ------------------ hw/pcnet.h | 19 +++++++++++++++++++ 3 files changed, 21 insertions(+), 20 deletions(-) diff --git a/hw/pcnet-pci.c b/hw/pcnet-pci.c index fb2a00c..ca548bd 100644 --- a/hw/pcnet-pci.c +++ b/hw/pcnet-pci.c @@ -55,9 +55,9 @@ static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) #ifdef PCNET_DEBUG printf("pcnet_aprom_writeb addr=0x%08x val=0x%02x\n", addr, val); #endif - /* Check APROMWE bit to enable write access */ - if (pcnet_bcr_readw(s,2) & 0x100) + if (BCR_APROMWE(s)) { s->prom[addr & 15] = val; + } } static uint32_t pcnet_aprom_readb(void *opaque, uint32_t addr) diff --git a/hw/pcnet.c b/hw/pcnet.c index cf16fd4..add3ec2 100644 --- a/hw/pcnet.c +++ b/hw/pcnet.c @@ -58,24 +58,6 @@ struct qemu_ether_header { uint16_t ether_type; }; -/* BUS CONFIGURATION REGISTERS */ -#define BCR_MSRDA 0 -#define BCR_MSWRA 1 -#define BCR_MC 2 -#define BCR_LNKST 4 -#define BCR_LED1 5 -#define BCR_LED2 6 -#define BCR_LED3 7 -#define BCR_FDC 9 -#define BCR_BSBC 18 -#define BCR_EECAS 19 -#define BCR_SWS 20 -#define BCR_PLAT 22 - -#define BCR_DWIO(S) !!((S)->bcr[BCR_BSBC] & 0x0080) -#define BCR_SSIZE32(S) !!((S)->bcr[BCR_SWS ] & 0x0100) -#define BCR_SWSTYLE(S) ((S)->bcr[BCR_SWS ] & 0x00FF) - #define CSR_INIT(S) !!(((S)->csr[0])&0x0001) #define CSR_STRT(S) !!(((S)->csr[0])&0x0002) #define CSR_STOP(S) !!(((S)->csr[0])&0x0004) diff --git a/hw/pcnet.h b/hw/pcnet.h index cd86bde..52cc52e 100644 --- a/hw/pcnet.h +++ b/hw/pcnet.h @@ -6,6 +6,25 @@ #include "memory.h" +/* BUS CONFIGURATION REGISTERS */ +#define BCR_MSRDA 0 +#define BCR_MSWRA 1 +#define BCR_MC 2 +#define BCR_LNKST 4 +#define BCR_LED1 5 +#define BCR_LED2 6 +#define BCR_LED3 7 +#define BCR_FDC 9 +#define BCR_BSBC 18 +#define BCR_EECAS 19 +#define BCR_SWS 20 +#define BCR_PLAT 22 + +#define BCR_APROMWE(S) !!((S)->bcr[BCR_MC ] & 0x0100) +#define BCR_DWIO(S) !!((S)->bcr[BCR_BSBC] & 0x0080) +#define BCR_SSIZE32(S) !!((S)->bcr[BCR_SWS ] & 0x0100) +#define BCR_SWSTYLE(S) ((S)->bcr[BCR_SWS ] & 0x00FF) + typedef struct PCNetState_st PCNetState; struct PCNetState_st { -- 1.7.3.4