From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:47663) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R91WR-0007Af-6v for qemu-devel@nongnu.org; Wed, 28 Sep 2011 17:18:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R91WQ-00070K-1i for qemu-devel@nongnu.org; Wed, 28 Sep 2011 17:18:31 -0400 Received: from fmmailgate01.web.de ([217.72.192.221]:45930) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R91WP-0006zo-Ry for qemu-devel@nongnu.org; Wed, 28 Sep 2011 17:18:30 -0400 Message-ID: <4E838F0B.2010900@web.de> Date: Wed, 28 Sep 2011 23:18:03 +0200 From: Jan Kiszka MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Sender: jan.kiszka@web.de Subject: Re: [Qemu-devel] [PATCH 11/22] i8259: Update IRQ state after reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: Anthony Liguori , qemu-devel On 2011-09-28 20:01, Blue Swirl wrote: > On Wed, Sep 28, 2011 at 11:00 AM, Jan Kiszka wrote: >> As we clearly modify the PIC state on pic_reset, we also have to update >> the IRQ output. This only happened on init so far. Apply this >> consistently. > > Nack, IRQ lines shouldn't be touched on reset. The other side may not > be ready for receiving the interrupt change and qemu_irqs are > stateless anyway. Sorry, but failing to clear the line (this is what pic_update_irq will effectively do) is a clear bug in the current code. This patch is 100% analogue to what, e.g. the PCI layer does on reset. Please re-read. Jan