From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:34672) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RCACr-0002qR-6m for qemu-devel@nongnu.org; Fri, 07 Oct 2011 09:11:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RCACl-0005w9-9h for qemu-devel@nongnu.org; Fri, 07 Oct 2011 09:11:17 -0400 Message-ID: <4E8EFA5E.4020101@adacore.com> Date: Fri, 07 Oct 2011 15:10:54 +0200 From: Fabien Chouteau MIME-Version: 1.0 References: <1317225245-24360-1-git-send-email-chouteau@adacore.com> <4E8EF34F.3010309@suse.de> In-Reply-To: <4E8EF34F.3010309@suse.de> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] Set an invalid-bits mask for each SPE instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 07/10/2011 14:40, Alexander Graf wrote: > On 09/28/2011 05:54 PM, Fabien Chouteau wrote: >> SPE instructions are defined by pairs. Currently, the invalid-bits mask is set >> for the first instruction, but the second one can have a different mask. >> >> example: >> GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, 0x00180000, PPC_SPE_DOUBLE), >> >> Signed-off-by: Fabien Chouteau > > It certainly doesn't make the code more ugly than it was before :). Applied to my local ppc-next branch. I take it that you verified all the invalid masks are sane. > Yes I checked all the masks so they should be OK. > There are some lines exceeding 80 characters, but I'm fairly sure they did before too. So I'll let this slip through for the sake of readability. > For these kind of definition lists the 80 characters limit can result in very awful code. Regards, -- Fabien Chouteau