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Date: Fri, 21 Oct 2011 22:36:48 +0200
From: Andreas <andreas.faerber@web.de>
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Subject: Re: [Qemu-devel] Multi heterogenous CPU archs for SoC sim?
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To: =?UTF-8?B?6Zmz6Z+L5Lu7?= <chenwj@iis.sinica.edu.tw>
Cc: Blue Swirl <blauwirbel@gmail.com>, Peter Maydell <peter.maydell@linaro.org>, =?UTF-8?B?TGx1w61z?= <xscript@gmx.net>, Greg McGary <greg.mcgary@gmail.com>, qemu-devel Developers <qemu-devel@nongnu.org>

Am 21.10.2011 09:26, schrieb =E9=99=B3=E9=9F=8B=E4=BB=BB:
>   COREMU treats QEMU as an entity and lauches multiple QEMUs at the sam=
e
> time. QEMUs communicates to each other by using a underlying thin layer
> provided by COREMU.

> I think this approach is much clean than trying to
> parallelize QEMU itself.

In this case I disagree. Given shared global memory and peripherals in
the SoC case, any IPC or shared-memory setup is destined to create
performance or management overhead.

When there's independent nodes connected via CAN/LIN/FlexRay, then I
agree that multiple processes communicating via UNIX sockets make a lot
of sense.

My use case here is testing and debugging, so I think we could live with
the blocks being executed in an interleaved fashion until someone has
the ultimate parallelization solution for upstream.

Regards,
Andreas