From: David Daney <david.daney@cavium.com>
To: Noor <noor.mubeen@gmail.com>
Cc: "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Subject: Re: cause IP zero on interrupt
Date: Fri, 21 Oct 2011 13:39:22 -0700 [thread overview]
Message-ID: <4EA1D87A.1090708@cavium.com> (raw)
In-Reply-To: <CAMmEz3QV+kWvRK9KnUdmKFGqNA8XUspjc_cH7aYXfea5XYaRAg@mail.gmail.com>
On 10/21/2011 01:18 PM, Noor wrote:
> what does it mean if cause register IP bits are zero after
> interrupt exception has already been invoked ?
>
It might mean that something was asserting a '1' on to those bits, but
quit doing so before you could read the cause register, or it could be
that you get random interrupt exceptions for no reason at all.
David Daney
next prev parent reply other threads:[~2011-10-21 20:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-21 20:18 cause IP zero on interrupt Noor
2011-10-21 20:39 ` David Daney [this message]
2011-10-21 20:48 ` Guenter Roeck
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