[PATCH] xen: provide pse36 cpuid bit

[Christoph Egger <Christoph.Egger@amd.com>]

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Provide pse36 cpuid bit if guest runs in 32bit PAE
or in long mode. Hyper-V refuses to start as
the "cpu does not provide required hw features"
if it does not find the pse36 cpuid bits.

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>

-- 
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632

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diff -r 0d092359d86f tools/libxc/xc_cpuid_x86.c
--- a/tools/libxc/xc_cpuid_x86.c	Wed Oct 26 10:32:36 2011 +0200
+++ b/tools/libxc/xc_cpuid_x86.c	Thu Oct 27 14:02:29 2011 +0200
@@ -98,7 +98,6 @@ static void amd_xc_cpuid_policy(
 
         if ( !is_pae )
             clear_bit(X86_FEATURE_PAE, regs[3]);
-        clear_bit(X86_FEATURE_PSE36, regs[3]);
 
         /* Filter all other features according to a whitelist. */
         regs[2] &= ((is_64bit ? bitmaskof(X86_FEATURE_LAHF_LM) : 0) |
@@ -339,6 +338,7 @@ static void xc_cpuid_hvm_policy(
                     bitmaskof(X86_FEATURE_CMOV) |
                     bitmaskof(X86_FEATURE_PAT) |
                     bitmaskof(X86_FEATURE_CLFLSH) |
+                    bitmaskof(X86_FEATURE_PSE36) |
                     bitmaskof(X86_FEATURE_MMX) |
                     bitmaskof(X86_FEATURE_FXSR) |
                     bitmaskof(X86_FEATURE_XMM) |
@@ -348,8 +348,10 @@ static void xc_cpuid_hvm_policy(
         /* We always support MTRR MSRs. */
         regs[3] |= bitmaskof(X86_FEATURE_MTRR);
 
-        if ( !is_pae )
+        if ( !is_pae ) {
             clear_bit(X86_FEATURE_PAE, regs[3]);
+            clear_bit(X86_FEATURE_PSE36, regs[3]);
+        }
         break;
 
     case 0x00000007: /* Intel-defined CPU features */
@@ -371,8 +373,10 @@ static void xc_cpuid_hvm_policy(
         break;
 
     case 0x80000001:
-        if ( !is_pae )
+        if ( !is_pae ) {
             clear_bit(X86_FEATURE_NX, regs[3]);
+            clear_bit(X86_FEATURE_PSE36, regs[3]);
+        }
         break;
 
     case 0x80000007:
diff -r 0d092359d86f xen/arch/x86/hvm/hvm.c
--- a/xen/arch/x86/hvm/hvm.c	Wed Oct 26 10:32:36 2011 +0200
+++ b/xen/arch/x86/hvm/hvm.c	Thu Oct 27 14:02:29 2011 +0200
@@ -2413,6 +2414,10 @@ void hvm_cpuid(unsigned int input, unsig
         if ( xsave_enabled(v) )
             *ecx |= (v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_OSXSAVE) ?
                      cpufeat_mask(X86_FEATURE_OSXSAVE) : 0;
+
+        /* Only provide PSE36 when guest runs in 32bit PAE or in long mode */
+        if ( !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) )
+            *edx &= ~cpufeat_mask(X86_FEATURE_PSE36);
         break;
     case 0x7:
         if ( (count == 0) && !cpu_has_smep )
@@ -2451,6 +2456,9 @@ void hvm_cpuid(unsigned int input, unsig
         /* Hide 1GB-superpage feature if we can't emulate it. */
         if (!hvm_pse1gb_supported(d))
             *edx &= ~cpufeat_mask(X86_FEATURE_PAGE1GB);
+        /* Only provide PSE36 when guest runs in 32bit PAE or in long mode */
+        if ( !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) )
+            *edx &= ~cpufeat_mask(X86_FEATURE_PSE36);
         break;
     }
 }

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