From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] mx31pdk: Enable D and I caches
Date: Wed, 02 Nov 2011 09:41:00 +0100 [thread overview]
Message-ID: <4EB1021C.4090101@denx.de> (raw)
In-Reply-To: <1320171397-28477-1-git-send-email-fabio.estevam@freescale.com>
On 11/01/2011 07:16 PM, Fabio Estevam wrote:
> Enable D and I caches on mx31pdk.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Stefano,
>
> You explained that enabling cache may cause some drivers like FEC and MMC not to work properly.
> As mx31pdk does not have FEC or MMC driver I thought this should be OK.
Ok, understood.
>
> Tested by booting Linux kernel via TFTP and mounting a NFS rootfs.
Good. To be sure, do you have also tested NAND in u-boot ? I do not
expect problems, but...
>
> board/freescale/mx31pdk/mx31pdk.c | 8 ++++++++
> 1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
> index 9f8bc53..1d7b4f6 100644
> --- a/board/freescale/mx31pdk/mx31pdk.c
> +++ b/board/freescale/mx31pdk/mx31pdk.c
> @@ -71,11 +71,19 @@ int board_early_init_f(void)
> return 0;
> }
>
> +void enable_caches(void)
> +{
> + icache_enable();
> + dcache_enable();
> +}
> +
> int board_init(void)
> {
> /* adress of boot parameters */
> gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
>
> + enable_caches();
> +
> return 0;
> }
>
Acked-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
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next prev parent reply other threads:[~2011-11-02 8:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-01 18:16 [U-Boot] [PATCH] mx31pdk: Enable D and I caches Fabio Estevam
2011-11-02 8:41 ` Stefano Babic [this message]
2011-11-02 23:31 ` Fabio Estevam
2011-11-03 8:02 ` Jason Liu
2011-11-04 6:40 ` Stefano Babic
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