From: Sergei Shtylyov <sshtylyov@mvista.com>
To: Maxime Bizon <mbizon@freebox.fr>
Cc: ralf@linux-mips.org, linux-mips@linux-mips.org
Subject: Re: [PATCH v2 04/11] MIPS: BCM63XX: introduce bcm_readll & bcm_writell.
Date: Sat, 05 Nov 2011 22:54:39 +0200 [thread overview]
Message-ID: <4EB5A28F.9060005@mvista.com> (raw)
In-Reply-To: <1320430175-13725-5-git-send-email-mbizon@freebox.fr>
Hello.
On 04.11.2011 20:09, Maxime Bizon wrote:
> Needed for upcoming 6368 CPU support.
>
> Signed-off-by: Maxime Bizon<mbizon@freebox.fr>
> ---
> arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
> index 91180fa..8bf4a67 100644
> --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
> +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
> @@ -49,9 +49,11 @@
> #define bcm_readb(a) (*(volatile unsigned char *) BCM_REGS_VA(a))
> #define bcm_readw(a) (*(volatile unsigned short *) BCM_REGS_VA(a))
> #define bcm_readl(a) (*(volatile unsigned int *) BCM_REGS_VA(a))
> +#define bcm_readll(a) (*(volatile u64 *) BCM_REGS_VA(a))
> #define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v))
> #define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v))
> #define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v))
> +#define bcm_writell(v, a) (*(volatile u64 *) BCM_REGS_VA((a)) = (v))
64-bit accessors are generally called readq()/writeq().
WBR, Sergei
next prev parent reply other threads:[~2011-11-05 20:54 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-04 18:09 [PATCH v2 00/11] MIPS: BCM63XX: add support for Broadcom 6368 CPU Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-04 18:09 ` [PATCH v2 01/11] MIPS: BCM63XX: set default pci cache line size Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-15 19:54 ` Ralf Baechle
2011-11-18 18:12 ` Maxime Bizon
2011-11-18 18:28 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 02/11] MIPS: BCM63XX: hook up plat_ioremap to intercept soc registers remapping Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:28 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 03/11] MIPS: BCM63XX: call board_register_device from device_initcall() Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:28 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 04/11] MIPS: BCM63XX: introduce bcm_readll & bcm_writell Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-05 20:54 ` Sergei Shtylyov [this message]
2011-11-16 11:29 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 05/11] MIPS: BCM63XX: cleanup cpu registers Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:29 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 06/11] MIPS: BCM63XX: add more register sets & missing register definitions Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:29 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 07/11] MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:30 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 08/11] MIPS: BCM63XX: prepare irq code to handle different external irq hardware implementation Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:30 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 09/11] MIPS: BCM63XX: handle 64 bits irq stat register in irq code Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:30 ` Ralf Baechle
2011-11-04 18:09 ` [PATCH v2 10/11] MIPS: BCM63XX: add external irq support for non 6348 CPUs Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-09 12:35 ` Jonas Gorski
2011-11-16 11:33 ` Ralf Baechle
2011-11-18 18:40 ` [PATCH v3 " Maxime Bizon
2011-11-04 18:09 ` [PATCH v2 11/11] MIPS: BCM63XX: add support for bcm6368 CPU Maxime Bizon
2011-11-04 18:09 ` Maxime Bizon
2011-11-16 11:33 ` Ralf Baechle
2011-11-18 18:41 ` [PATCH v3 " Maxime Bizon
2011-11-09 12:43 ` [PATCH v2 00/11] MIPS: BCM63XX: add support for Broadcom 6368 CPU Jonas Gorski
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