From: Albert ARIBAUD <albert.u.boot@aribaud.net>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ARM: Generic cache ops skeleton
Date: Mon, 07 Nov 2011 13:21:43 +0100 [thread overview]
Message-ID: <4EB7CD57.3050207@aribaud.net> (raw)
In-Reply-To: <1320542183-20309-1-git-send-email-marek.vasut@gmail.com>
Le 06/11/2011 02:16, Marek Vasut a ?crit :
> This patch should allow a CPU to register it's own cache ops. This shall allow
> multiple CPUs with different cache handlings to be supported.
I don't really like the idea of a system of dynamic cache ops right now,
because as discussed by Mike, we're far from a one-size-fits-all
multiple-SoC binary, and in the current context of a single-SoC binary,
this patch is overkill for cache management IMO.
OTOH, I am not against rationalizing the cache code, along the lines
already discussed, i.e. factorizing cache code as much as possible (just
as we should factorize start.S code for instance).
Amicalement,
--
Albert.
prev parent reply other threads:[~2011-11-07 12:21 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-06 1:16 [U-Boot] [PATCH] ARM: Generic cache ops skeleton Marek Vasut
2011-11-06 8:36 ` Mike Frysinger
2011-11-06 12:39 ` Marek Vasut
2011-11-06 18:03 ` Mike Frysinger
2011-11-06 18:07 ` Marek Vasut
2011-11-06 19:29 ` Simon Glass
2011-11-07 1:09 ` Mike Frysinger
2011-11-07 3:10 ` Simon Glass
2011-11-07 12:36 ` Albert ARIBAUD
2011-11-07 1:03 ` Mike Frysinger
2011-11-07 12:21 ` Albert ARIBAUD [this message]
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