From: Timur Tabi <timur@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] Is CCSRBAR relocation broken on P2020?
Date: Thu, 10 Nov 2011 13:28:42 -0600 [thread overview]
Message-ID: <4EBC25EA.7010608@freescale.com> (raw)
In-Reply-To: <CAEsOVNdv=EnDVrtc+qMGnLicWma7L-QwdBiOHzRyz3A6jDoZ_g@mail.gmail.com>
McClintock Matthew-B29882 wrote:
> Did you test your CCSRBAR changes with a board that uses the on chip
> rom as well as L2SRAM to boot?
No, just the on-chip ROM. Kumar later noticed that NAND booting was broken, so I fixed that too. That's why I'm saying the latest set of patches should fix it for everyone.
I didn't consider the combination of multi-stage with SRAM, but since normal U-Boot runs from SRAM first, I expect that to work as well.
> Does the COME board load from SDCARD to
> DDR or to L2SRAM? I suspect it's L2SRAM since this board has 512kB
> which is large enough for a stock u-boot image.
Ira says that early boot loader sets of DDR, so I presume it's running from that, not SRAM.
--
Timur Tabi
Linux kernel developer at Freescale
next prev parent reply other threads:[~2011-11-10 19:28 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-10 16:54 [U-Boot] Is CCSRBAR relocation broken on P2020? Ira W. Snyder
2011-11-10 17:12 ` Timur Tabi
2011-11-10 17:33 ` Ira W. Snyder
2011-11-10 17:47 ` Timur Tabi
2011-11-10 19:24 ` McClintock Matthew-B29882
2011-11-10 19:28 ` Timur Tabi [this message]
2011-11-10 19:46 ` Ira W. Snyder
2011-11-10 19:49 ` Timur Tabi
2011-11-10 19:59 ` Ira W. Snyder
[not found] <4EBC2D50.5070200@embedded-sol.com>
2011-11-10 20:07 ` Felix Radensky
2011-11-10 20:48 ` Ira W. Snyder
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