diff for duplicates of <4EBDE766.5080505@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 1f41fdd..506f774 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ On 11/11/2011 05:22 AM, Peter De Schrijver wrote: > This patch adds the initial device tree for tegra30 > -> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> > --- > arch/arm/boot/dts/tegra30.dtsi | 127 ++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 127 insertions(+), 0 deletions(-) @@ -22,7 +22,7 @@ Needs documentation. > + interrupt-parent = <&intc>; > + -> + intc: interrupt-controller@50041000 { +> + intc: interrupt-controller at 50041000 { > + compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic"; > + interrupt-controller; > + #interrupt-cells = <1>; @@ -36,7 +36,7 @@ Rob > + < 0x50040100 0x0100 >; > + }; > + -> + i2c@7000c000 { +> + i2c at 7000c000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; @@ -44,7 +44,7 @@ Rob > + interrupts = < 70 >; > + }; > + -> + i2c@7000c400 { +> + i2c at 7000c400 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; @@ -52,7 +52,7 @@ Rob > + interrupts = < 116 >; > + }; > + -> + i2c@7000c500 { +> + i2c at 7000c500 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; @@ -60,7 +60,7 @@ Rob > + interrupts = < 124 >; > + }; > + -> + i2c@7000c700 { +> + i2c at 7000c700 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; @@ -68,7 +68,7 @@ Rob > + interrupts = < 152 >; > + }; > + -> + i2c@7000d000 { +> + i2c at 7000d000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; @@ -76,7 +76,7 @@ Rob > + interrupts = < 85 >; > + }; > + -> + gpio: gpio@6000d000 { +> + gpio: gpio at 6000d000 { > + compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; > + reg = < 0x6000d000 0x1000 >; > + interrupts = < 64 65 66 67 87 119 121 >; @@ -84,66 +84,66 @@ Rob > + gpio-controller; > + }; > + -> + serial@70006000 { +> + serial at 70006000 { > + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; > + reg = <0x70006000 0x40>; > + reg-shift = <2>; > + interrupts = < 68 >; > + }; > + -> + serial@70006040 { +> + serial at 70006040 { > + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; > + reg = <0x70006040 0x40>; > + reg-shift = <2>; > + interrupts = < 69 >; > + }; > + -> + serial@70006200 { +> + serial at 70006200 { > + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; > + reg = <0x70006200 0x100>; > + reg-shift = <2>; > + interrupts = < 78 >; > + }; > + -> + serial@70006300 { +> + serial at 70006300 { > + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; > + reg = <0x70006300 0x100>; > + reg-shift = <2>; > + interrupts = < 122 >; > + }; > + -> + serial@70006400 { +> + serial at 70006400 { > + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; > + reg = <0x70006400 0x100>; > + reg-shift = <2>; > + interrupts = < 123 >; > + }; > + -> + sdhci@78000000 { +> + sdhci at 78000000 { > + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; > + reg = <0x78000000 0x200>; > + interrupts = < 46 >; > + }; > + -> + sdhci@78000200 { +> + sdhci at 78000200 { > + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; > + reg = <0x78000200 0x200>; > + interrupts = < 47 >; > + }; > + -> + sdhci@78000400 { +> + sdhci at 78000400 { > + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; > + reg = <0x78000400 0x200>; > + interrupts = < 51 >; > + }; > + -> + sdhci@78000600 { +> + sdhci at 78000600 { > + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; > + reg = <0x78000600 0x200>; > + interrupts = < 63 >; > + }; > + -> + pinmux: pinmux@70000000 { +> + pinmux: pinmux at 70000000 { > + compatible = "nvidia,tegra30-pinmux"; > + reg = < 0x70000868 0xd0 /* Pad control registers */ > + 0x70003000 0x3e0 >; /* Mux registers */ diff --git a/a/content_digest b/N1/content_digest index 58a04ff..50b4368 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,23 +1,15 @@ "ref\01321010541-31337-1-git-send-email-pdeschrijver@nvidia.com\0" "ref\01321010541-31337-2-git-send-email-pdeschrijver@nvidia.com\0" - "ref\01321010541-31337-2-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Subject\0Re: [PATCH v4 01/10] arm/tegra: initial device tree for tegra30\0" + "From\0robherring2@gmail.com (Rob Herring)\0" + "Subject\0[PATCH v4 01/10] arm/tegra: initial device tree for tegra30\0" "Date\0Fri, 11 Nov 2011 21:26:30 -0600\0" - "To\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - Colin Cross <ccross-z5hGa2qSFaRBDgjK7y7TUQ@public.gmane.org> - Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 11/11/2011 05:22 AM, Peter De Schrijver wrote:\n" "> This patch adds the initial device tree for tegra30\n" "> \n" - "> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>\n" "> ---\n" "> arch/arm/boot/dts/tegra30.dtsi | 127 ++++++++++++++++++++++++++++++++++++++++\n" "> 1 files changed, 127 insertions(+), 0 deletions(-)\n" @@ -38,7 +30,7 @@ "\n" "> +\tinterrupt-parent = <&intc>;\n" "> +\n" - "> +\tintc: interrupt-controller@50041000 {\n" + "> +\tintc: interrupt-controller at 50041000 {\n" "> +\t\tcompatible = \"nvidia,tegra30-gic\", \"nvidia,tegra20-gic\";\n" "> +\t\tinterrupt-controller;\n" "> +\t\t#interrupt-cells = <1>;\n" @@ -52,7 +44,7 @@ "> +\t\t < 0x50040100 0x0100 >;\n" "> +\t};\n" "> +\n" - "> +\ti2c@7000c000 {\n" + "> +\ti2c at 7000c000 {\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\t\tcompatible = \"nvidia,tegra30-i2c\", \"nvidia,tegra20-i2c\";\n" @@ -60,7 +52,7 @@ "> +\t\tinterrupts = < 70 >;\n" "> +\t};\n" "> +\n" - "> +\ti2c@7000c400 {\n" + "> +\ti2c at 7000c400 {\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\t\tcompatible = \"nvidia,tegra30-i2c\", \"nvidia,tegra20-i2c\";\n" @@ -68,7 +60,7 @@ "> +\t\tinterrupts = < 116 >;\n" "> +\t};\n" "> +\n" - "> +\ti2c@7000c500 {\n" + "> +\ti2c at 7000c500 {\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\t\tcompatible = \"nvidia,tegra30-i2c\", \"nvidia,tegra20-i2c\";\n" @@ -76,7 +68,7 @@ "> +\t\tinterrupts = < 124 >;\n" "> +\t};\n" "> +\n" - "> +\ti2c@7000c700 {\n" + "> +\ti2c at 7000c700 {\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\t\tcompatible = \"nvidia,tegra30-i2c\", \"nvidia,tegra20-i2c\";\n" @@ -84,7 +76,7 @@ "> +\t\tinterrupts = < 152 >;\n" "> +\t};\n" "> +\n" - "> +\ti2c@7000d000 {\n" + "> +\ti2c at 7000d000 {\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\t\tcompatible = \"nvidia,tegra30-i2c\", \"nvidia,tegra20-i2c\";\n" @@ -92,7 +84,7 @@ "> +\t\tinterrupts = < 85 >;\n" "> +\t};\n" "> +\n" - "> +\tgpio: gpio@6000d000 {\n" + "> +\tgpio: gpio at 6000d000 {\n" "> +\t\tcompatible = \"nvidia,tegra30-gpio\", \"nvidia,tegra20-gpio\";\n" "> +\t\treg = < 0x6000d000 0x1000 >;\n" "> +\t\tinterrupts = < 64 65 66 67 87 119 121 >;\n" @@ -100,70 +92,70 @@ "> +\t\tgpio-controller;\n" "> +\t};\n" "> +\n" - "> +\tserial@70006000 {\n" + "> +\tserial at 70006000 {\n" "> +\t\tcompatible = \"nvidia,tegra30-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006000 0x40>;\n" "> +\t\treg-shift = <2>;\n" "> +\t\tinterrupts = < 68 >;\n" "> +\t};\n" "> +\n" - "> +\tserial@70006040 {\n" + "> +\tserial at 70006040 {\n" "> +\t\tcompatible = \"nvidia,tegra30-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006040 0x40>;\n" "> +\t\treg-shift = <2>;\n" "> +\t\tinterrupts = < 69 >;\n" "> +\t};\n" "> +\n" - "> +\tserial@70006200 {\n" + "> +\tserial at 70006200 {\n" "> +\t\tcompatible = \"nvidia,tegra30-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006200 0x100>;\n" "> +\t\treg-shift = <2>;\n" "> +\t\tinterrupts = < 78 >;\n" "> +\t};\n" "> +\n" - "> +\tserial@70006300 {\n" + "> +\tserial at 70006300 {\n" "> +\t\tcompatible = \"nvidia,tegra30-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006300 0x100>;\n" "> +\t\treg-shift = <2>;\n" "> +\t\tinterrupts = < 122 >;\n" "> +\t};\n" "> +\n" - "> +\tserial@70006400 {\n" + "> +\tserial at 70006400 {\n" "> +\t\tcompatible = \"nvidia,tegra30-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006400 0x100>;\n" "> +\t\treg-shift = <2>;\n" "> +\t\tinterrupts = < 123 >;\n" "> +\t};\n" "> +\n" - "> +\tsdhci@78000000 {\n" + "> +\tsdhci at 78000000 {\n" "> +\t\tcompatible = \"nvidia,tegra30-sdhci\", \"nvidia,tegra20-sdhci\";\n" "> +\t\treg = <0x78000000 0x200>;\n" "> +\t\tinterrupts = < 46 >;\n" "> +\t};\n" "> +\n" - "> +\tsdhci@78000200 {\n" + "> +\tsdhci at 78000200 {\n" "> +\t\tcompatible = \"nvidia,tegra30-sdhci\", \"nvidia,tegra20-sdhci\";\n" "> +\t\treg = <0x78000200 0x200>;\n" "> +\t\tinterrupts = < 47 >;\n" "> +\t};\n" "> +\n" - "> +\tsdhci@78000400 {\n" + "> +\tsdhci at 78000400 {\n" "> +\t\tcompatible = \"nvidia,tegra30-sdhci\", \"nvidia,tegra20-sdhci\";\n" "> +\t\treg = <0x78000400 0x200>;\n" "> +\t\tinterrupts = < 51 >;\n" "> +\t};\n" "> +\n" - "> +\tsdhci@78000600 {\n" + "> +\tsdhci at 78000600 {\n" "> +\t\tcompatible = \"nvidia,tegra30-sdhci\", \"nvidia,tegra20-sdhci\";\n" "> +\t\treg = <0x78000600 0x200>;\n" "> +\t\tinterrupts = < 63 >;\n" "> +\t};\n" "> +\n" - "> +\tpinmux: pinmux@70000000 {\n" + "> +\tpinmux: pinmux at 70000000 {\n" "> +\t\tcompatible = \"nvidia,tegra30-pinmux\";\n" "> +\t\treg = < 0x70000868 0xd0 /* Pad control registers */\n" "> +\t\t\t0x70003000 0x3e0 >; /* Mux registers */\n" "> +\t};\n" > +}; -86d57a1d45e37b0b10763f0340aa5512c30f882efa3cc3333c02b83beb022108 +dc33d12a6914d2a83c7511402cdbe5e959802228259b62f6d72f01a9559b82fa
diff --git a/a/1.txt b/N2/1.txt index 1f41fdd..bb7ee2b 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,7 +1,7 @@ On 11/11/2011 05:22 AM, Peter De Schrijver wrote: > This patch adds the initial device tree for tegra30 > -> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> > --- > arch/arm/boot/dts/tegra30.dtsi | 127 ++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 127 insertions(+), 0 deletions(-) diff --git a/a/content_digest b/N2/content_digest index 58a04ff..5d2747c 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,23 +1,22 @@ "ref\01321010541-31337-1-git-send-email-pdeschrijver@nvidia.com\0" "ref\01321010541-31337-2-git-send-email-pdeschrijver@nvidia.com\0" - "ref\01321010541-31337-2-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "From\0Rob Herring <robherring2@gmail.com>\0" "Subject\0Re: [PATCH v4 01/10] arm/tegra: initial device tree for tegra30\0" "Date\0Fri, 11 Nov 2011 21:26:30 -0600\0" - "To\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - Colin Cross <ccross-z5hGa2qSFaRBDgjK7y7TUQ@public.gmane.org> - Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "To\0Peter De Schrijver <pdeschrijver@nvidia.com>\0" + "Cc\0Stephen Warren <swarren@nvidia.com>" + linux-kernel@vger.kernel.org + linux-tegra@vger.kernel.org + Colin Cross <ccross@android.com> + Olof Johansson <olof@lixom.net> + Russell King <linux@arm.linux.org.uk> + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 11/11/2011 05:22 AM, Peter De Schrijver wrote:\n" "> This patch adds the initial device tree for tegra30\n" "> \n" - "> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>\n" "> ---\n" "> arch/arm/boot/dts/tegra30.dtsi | 127 ++++++++++++++++++++++++++++++++++++++++\n" "> 1 files changed, 127 insertions(+), 0 deletions(-)\n" @@ -166,4 +165,4 @@ "> +\t};\n" > +}; -86d57a1d45e37b0b10763f0340aa5512c30f882efa3cc3333c02b83beb022108 +c84565d828c9d64277a4cb1abf0337eadc6cd73a7854c444b19ccc30acdbf453
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