From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christian Schmidt Subject: [PATCH] intel-dri: Fix initialization if startup happens in interlaced mode [v2] Date: Mon, 14 Nov 2011 12:21:35 +0100 Message-ID: <4EC0F9BF.2060402@digadd.de> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------040807090101080109060202" Return-path: Received: from mx1.digadd.de (mx2.digadd.de [195.47.195.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E17C9EF3C for ; Mon, 14 Nov 2011 03:22:10 -0800 (PST) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org This is a multi-part message in MIME format. --------------040807090101080109060202 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit My EFI BIOS starts the graphics card up in my projector's preferred EDID mode, 1080@60i. The Intel driver does not clear the interlaced bit: #define PIPECONF_PROGRESSIVE (0 << 21) #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) This patch introduces a new PIPECONF_INTERLACE_MASK define and uses it to restore progressive mode. Signed-of-by: Christian Schmidt --------------040807090101080109060202 Content-Type: text/x-patch; name="fix_startup_in_interlaced_mode.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="fix_startup_in_interlaced_mode.patch" diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/i915/i915_reg.h linux-3.2-rc1/drivers/gpu/drm/i915/i915_reg.h --- linux-3.2-rc1.orig/drivers/gpu/drm/i915/i915_reg.h 2011-11-14 12:16:42.811994538 +0100 +++ linux-3.2-rc1/drivers/gpu/drm/i915/i915_reg.h 2011-11-14 12:17:05.124715590 +0100 @@ -2312,6 +2312,7 @@ #define PIPECONF_PROGRESSIVE (0 << 21) #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) +#define PIPECONF_INTERLACE_MASK (7 << 21) #define PIPECONF_CXSR_DOWNCLOCK (1<<16) #define PIPECONF_BPP_MASK (0x000000e0) #define PIPECONF_BPP_8 (0<<5) diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c --- linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c 2011-11-08 01:16:02.000000000 +0100 +++ linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c 2011-11-14 12:15:59.373537593 +0100 @@ -5136,7 +5136,7 @@ adjusted_mode->crtc_vsync_end -= 1; adjusted_mode->crtc_vsync_start -= 1; } else - pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */ + pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */ I915_WRITE(HTOTAL(pipe), (adjusted_mode->crtc_hdisplay - 1) | --------------040807090101080109060202 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel --------------040807090101080109060202--