From: "Niklas Söderlund" <niklas.soderlund@ericsson.com>
To: Borislav Petkov <bp@amd64.org>
Cc: Tony Luck <tony.luck@gmail.com>,
"dougthompson@xmission.com" <dougthompson@xmission.com>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] amd64_edac: Fix K8 revD and later chip select sizes
Date: Tue, 15 Nov 2011 09:10:54 +0100 [thread overview]
Message-ID: <4EC21E8E.5050003@ericsson.com> (raw)
In-Reply-To: <20111114165459.GA29762@aftab>
On Mon 14 Nov 2011 05:54:59 PM CET, Borislav Petkov wrote:
>
> Fix DRAM chip select sizes calculation for K8, revisions D and E.
>
> Reported-by: Niklas Söderlund<niklas.soderlund@ericsson.com
> Link: http://lkml.kernel.org/r/1320849178-23340-1-git-send-email-niklas.soderlund@ericsson.com
> Signed-off-by: Borislav Petkov<borislav.petkov@amd.com>
> ---
>
> @Niklas: would you please verify this patch fixes your issue?
>
> Thanks.
>
> drivers/edac/amd64_edac.c | 32 ++++++++++++++++++++++++++++----
> 1 files changed, 28 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index c9eee6d..6a83d49 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -1132,12 +1132,36 @@ static int k8_dbam_to_chip_select(struct amd64_pvt *pvt, u8 dct,
> return ddr2_cs_size(cs_mode, dclr& WIDTH_128);
> }
> else if (pvt->ext_model>= K8_REV_D) {
> + unsigned diff;
> WARN_ON(cs_mode> 10);
>
> - if (cs_mode == 3 || cs_mode == 8)
> - return 32<< (cs_mode - 1);
> - else
> - return 32<< cs_mode;
> + /*
> + * the below calculation, besides trying to win an obfuscated C
> + * contest, maps cs_mode values to DIMM chip select sizes. The
> + * mappings are:
> + *
> + * cs_mode CS size (mb)
> + * ======= ============
> + * 0 32
> + * 1 64
> + * 2 128
> + * 3 128
> + * 4 256
> + * 5 512
> + * 6 256
> + * 7 512
> + * 8 1024
> + * 9 1024
> + * 10 2048
> + *
> + * Basically, it calculates a value with which to shift the
> + * smallest CS size of 32MB.
> + *
> + * ddr[23]_cs_size have a similar purpose.
> + */
> + diff = cs_mode/3 + (unsigned)(cs_mode> 5);
> +
> + return 32<< (cs_mode - diff);
> }
> else {
> WARN_ON(cs_mode> 6);
Hi Borislav,
Yes the patch fixes my problem, but it truly is obfuscated C.
Thanks
// Niklas
next prev parent reply other threads:[~2011-11-15 8:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-09 14:32 [PATCH] amd64_edac: fix size decoding error on K8 Niklas Söderlund
2011-11-09 14:42 ` Borislav Petkov
2011-11-09 15:13 ` Niklas Söderlund
2011-11-09 20:35 ` Borislav Petkov
2011-11-09 20:50 ` Tony Luck
2011-11-09 21:00 ` Borislav Petkov
2011-11-14 16:54 ` [PATCH] amd64_edac: Fix K8 revD and later chip select sizes Borislav Petkov
2011-11-15 8:10 ` Niklas Söderlund [this message]
2011-11-09 20:51 ` [PATCH] amd64_edac: fix size decoding error on K8 Nils Carlson
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