diff for duplicates of <4ECCE393.2030600@freescale.com> diff --git a/a/1.txt b/N1/1.txt index 93d6b86..31d38a9 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,20 +1,26 @@ -于 2011年11月23日 07:55, Scott Wood 写道: +=E4=BA=8E 2011=E5=B9=B411=E6=9C=8823=E6=97=A5 07:55, Scott Wood =E5=86=99= +=E9=81=93: > On 11/15/2011 03:29 AM, b35362@freescale.com wrote: >> From: Liu Shuo<b35362@freescale.com> >> ->> Freescale FCM controller has a 2K size limitation of buffer RAM. In order ->> to support the Nand flash chip whose page size is larger than 2K bytes, ->> we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save +>> Freescale FCM controller has a 2K size limitation of buffer RAM. In or= +der +>> to support the Nand flash chip whose page size is larger than 2K bytes= +, +>> we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and sa= +ve >> them to a large buffer. >> >> Signed-off-by: Liu Shuo<Shuo.Liu@freescale.com> >> Signed-off-by: Shengzhou Liu<Shengzhou.Liu@freescale.com> >> Signed-off-by: Li Yang<leoli@freescale.com> >> --- ->> drivers/mtd/nand/fsl_elbc_nand.c | 216 +++++++++++++++++++++++++++++++++++--- +>> drivers/mtd/nand/fsl_elbc_nand.c | 216 ++++++++++++++++++++++++++++= ++++++++--- >> 1 files changed, 199 insertions(+), 17 deletions(-) >> ->> diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c +>> diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_e= +lbc_nand.c >> index c2c231b..415f87e 100644 >> --- a/drivers/mtd/nand/fsl_elbc_nand.c >> +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -22,8 +28,9 @@ >> struct device *dev; >> int bank; /* Chip select bank number */ >> u8 __iomem *vbase; /* Chip select base virtual address */ ->> - int page_size; /* NAND page size (0=512, 1=2048) */ ->> + int page_size; /* NAND page size (0=512, 1=2048, 2=4096...), +>> - int page_size; /* NAND page size (0=3D512, 1=3D2048) */ +>> + int page_size; /* NAND page size (0=3D512, 1=3D2048, 2=3D40= +96...), >> + * the mutiple of 2048. >> + */ > That "..." isn't very descriptive. What happens with 8192-byte pages? @@ -31,14 +38,15 @@ > > Please just get rid of this and use mtd->writesize. > ->> + for (i = 1; i< priv->page_size; i++) { +>> + for (i =3D 1; i< priv->page_size; i++) { >> + /* >> + * Maybe there are some reasons of FCM hardware timming, >> + * we must insert a FIR_OP_NOP(0x00) before FIR_OP_RB. >> + */ > s/timming/timing/ > ->> /* PAGEPROG reuses all of the setup from SEQIN and adds the length */ +>> /* PAGEPROG reuses all of the setup from SEQIN and adds the length = +*/ >> case NAND_CMD_PAGEPROG: { >> + int len; >> dev_vdbg(priv->dev, @@ -49,8 +57,8 @@ >> * then set the exact length, otherwise use a full page >> * write so the HW generates the ECC. >> */ ->> - if (elbc_fcm_ctrl->oob || elbc_fcm_ctrl->column != 0 || ->> + if (elbc_fcm_ctrl->column>= mtd->writesize) { +>> - if (elbc_fcm_ctrl->oob || elbc_fcm_ctrl->column !=3D 0 || +>> + if (elbc_fcm_ctrl->column>=3D mtd->writesize) { >> + /* write oob */ >> + if (priv->page_size> 1) { >> + /* when pagesize of chip is greater than 2048, @@ -66,93 +74,99 @@ > discontiguous write? > I have no better way to implement it now. -Some chips have 'NOP' limitation, so I don't use the FIR_OP_UA to do a +Some chips have 'NOP' limitation, so I don't use the FIR_OP_UA to do a=20 oob write. ->> + len = 2112; -> len = min(elbc_fcm_ctrl->index, 2112); -when do a oob write (writesize > 2048), elbc_fcm_ctrl->index is greater +>> + len =3D 2112; +> len =3D min(elbc_fcm_ctrl->index, 2112); +when do a oob write (writesize > 2048), elbc_fcm_ctrl->index is greater=20 writesize (is 4096 at least). >> + } else ->> + len = mtd->writesize + mtd->oobsize - +>> + len =3D mtd->writesize + mtd->oobsize - >> + elbc_fcm_ctrl->column; >> + out_be32(&lbc->fbcr, len); -> len = elbc_fcm_ctrl->index - elbc_fcm_ctrl->column; +> len =3D elbc_fcm_ctrl->index - elbc_fcm_ctrl->column; > > Use braces on both sides of the if/else if it's needed on one side. ->> + } else if (elbc_fcm_ctrl->column != 0 || ->> elbc_fcm_ctrl->index != mtd->writesize + mtd->oobsize) +>> + } else if (elbc_fcm_ctrl->column !=3D 0 || +>> elbc_fcm_ctrl->index !=3D mtd->writesize + mtd->oobsize) >> out_be32(&lbc->fbcr, elbc_fcm_ctrl->index); > This should have set fbcr to index - column as well (after adjusting -- > though really it's not a supported use case. We should only be seeing -> column != 0 for oob. +> column !=3D 0 for oob. > I have make a independent to fix this issue. (In fact,documentation says FCM will stop automatically after reading the last byte of spare region) ->> @@ -625,10 +776,16 @@ static int fsl_elbc_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) +>> @@ -625,10 +776,16 @@ static int fsl_elbc_verify_buf(struct mtd_info *= +mtd, const u_char *buf, int len) >> return -EINVAL; >> } >> ->> - for (i = 0; i< len; i++) +>> - for (i =3D 0; i< len; i++) >> - if (in_8(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index + i]) ->> - != buf[i]) +>> - !=3D buf[i]) >> - break; >> + if (mtd->writesize> 2048) ->> + for (i = 0; i< len; i++) +>> + for (i =3D 0; i< len; i++) >> + if (elbc_fcm_ctrl->buffer[elbc_fcm_ctrl->index + i] ->> + != buf[i]) +>> + !=3D buf[i]) >> + break; >> + else ->> + for (i = 0; i< len; i++) +>> + for (i =3D 0; i< len; i++) >> + if (in_8(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index + i]) ->> + != buf[i]) +>> + !=3D buf[i]) >> + break; > Please use braces around multiline if/for bodies, even if they're > technically a single statement -- especially when you've got a dangling > else. > ->> elbc_fcm_ctrl->index += len; ->> return i == len&& elbc_fcm_ctrl->status == LTESR_CC ? 0 : -EIO; ->> @@ -657,6 +814,7 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) ->> struct fsl_elbc_mtd *priv = chip->priv; ->> struct fsl_lbc_ctrl *ctrl = priv->ctrl; ->> struct fsl_lbc_regs __iomem *lbc = ctrl->regs; ->> + struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; +>> elbc_fcm_ctrl->index +=3D len; +>> return i =3D=3D len&& elbc_fcm_ctrl->status =3D=3D LTESR_CC ? 0 : = +-EIO; +>> @@ -657,6 +814,7 @@ static int fsl_elbc_chip_init_tail(struct mtd_info= + *mtd) +>> struct fsl_elbc_mtd *priv =3D chip->priv; +>> struct fsl_lbc_ctrl *ctrl =3D priv->ctrl; +>> struct fsl_lbc_regs __iomem *lbc =3D ctrl->regs; +>> + struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl =3D ctrl->nand; >> unsigned int al; >> >> /* calculate FMR Address Length field */ ->> @@ -707,12 +865,17 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) ->> dev_dbg(priv->dev, "fsl_elbc_init: mtd->oobsize = %d\n", +>> @@ -707,12 +865,17 @@ static int fsl_elbc_chip_init_tail(struct mtd_in= +fo *mtd) +>> dev_dbg(priv->dev, "fsl_elbc_init: mtd->oobsize =3D %d\n", >> mtd->oobsize); >> >> + kfree(elbc_fcm_ctrl->buffer); ->> + elbc_fcm_ctrl->buffer = NULL; +>> + elbc_fcm_ctrl->buffer =3D NULL; >> + >> /* adjust Option Register and ECC to match Flash page size */ ->> if (mtd->writesize == 512) { ->> priv->page_size = 0; +>> if (mtd->writesize =3D=3D 512) { +>> priv->page_size =3D 0; >> clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); ->> - } else if (mtd->writesize == 2048) { ->> - priv->page_size = 1; ->> + } else if (mtd->writesize>= 2048) { ->> + /* page_size = writesize / 2048 */ ->> + priv->page_size = mtd->writesize>> 11; -> Why not just write priv->page_size = mtd->writesize / 2048 in the code +>> - } else if (mtd->writesize =3D=3D 2048) { +>> - priv->page_size =3D 1; +>> + } else if (mtd->writesize>=3D 2048) { +>> + /* page_size =3D writesize / 2048 */ +>> + priv->page_size =3D mtd->writesize>> 11; +> Why not just write priv->page_size =3D mtd->writesize / 2048 in the cod= +e > rather than the comment (it compiles to the same code)? Other than > because you were requested to remove priv->page_size, that is. :-) > >> setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); >> /* adjust ecc setup if needed */ ->> if ((in_be32(&lbc->bank[priv->bank].br)& BR_DECC) == ->> @@ -723,6 +886,14 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) +>> if ((in_be32(&lbc->bank[priv->bank].br)& BR_DECC) =3D=3D +>> @@ -723,6 +886,14 @@ static int fsl_elbc_chip_init_tail(struct mtd_inf= +o *mtd) >> &fsl_elbc_oob_lp_eccm0; ->> chip->badblock_pattern =&largepage_memorybased; +>> chip->badblock_pattern =3D&largepage_memorybased; >> } >> + >> + /* re-malloc if pagesize> 2048*/ >> + if (mtd->writesize> 2048) { ->> + elbc_fcm_ctrl->buffer = kmalloc(mtd->writesize + +>> + elbc_fcm_ctrl->buffer =3D kmalloc(mtd->writesize + >> + mtd->oobsize, GFP_KERNEL); >> + if (!elbc_fcm_ctrl->buffer) >> + return -ENOMEM; @@ -160,18 +174,22 @@ reading the last byte of spare region) >> } else { >> dev_err(priv->dev, >> "fsl_elbc_init: page size %d is not supported\n", -> buffer is a controller-wide resource, but you're setting it based on the +> buffer is a controller-wide resource, but you're setting it based on th= +e > most-recently-probed NAND chip. It should be large enough to -> accommodate the largest page size in use on any connected chip. Even if +> accommodate the largest page size in use on any connected chip. Even i= +f > all chips in the system have the same page size, you're introducing a > race if a previously-probed chip is already in use (the controller lock > is not held here). > -> Just allocate a buffer large enough for a 16K page size in the main init +> Just allocate a buffer large enough for a 16K page size in the main ini= +t > function, and print an error in the tail if you encounter a larger page > size. > ->> @@ -886,6 +1057,17 @@ static int __devinit fsl_elbc_nand_probe(struct platform_device *pdev) +>> @@ -886,6 +1057,17 @@ static int __devinit fsl_elbc_nand_probe(struct = +platform_device *pdev) >> goto err; >> } >> elbc_fcm_ctrl->counter++; @@ -183,7 +201,7 @@ reading the last byte of spare region) >> + * don't know writesize before calling nand_scan(). We will >> + * re-malloc later if needed. >> + */ ->> + elbc_fcm_ctrl->buffer = kmalloc(4096 * 6, GFP_KERNEL); +>> + elbc_fcm_ctrl->buffer =3D kmalloc(4096 * 6, GFP_KERNEL); >> + if (!elbc_fcm_ctrl->buffer) >> + return -ENOMEM; > Clean up properly if you fail to allocate the buffer. This includes diff --git a/a/content_digest b/N1/content_digest index 3f0743a..c1c697a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -13,27 +13,32 @@ Shengzhou Liu <Shengzhou.Liu@freescale.com> linux-mtd@lists.infradead.org akpm@linux-foundation.org - leoli@freescale.com " dwmw2@infradead.org\0" "\00:1\0" "b\0" - "\344\272\216 2011\345\271\26411\346\234\21023\346\227\245 07:55, Scott Wood \345\206\231\351\201\223:\n" + "=E4=BA=8E 2011=E5=B9=B411=E6=9C=8823=E6=97=A5 07:55, Scott Wood =E5=86=99=\n" + "=E9=81=93:\n" "> On 11/15/2011 03:29 AM, b35362@freescale.com wrote:\n" ">> From: Liu Shuo<b35362@freescale.com>\n" ">>\n" - ">> Freescale FCM controller has a 2K size limitation of buffer RAM. In order\n" - ">> to support the Nand flash chip whose page size is larger than 2K bytes,\n" - ">> we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save\n" + ">> Freescale FCM controller has a 2K size limitation of buffer RAM. In or=\n" + "der\n" + ">> to support the Nand flash chip whose page size is larger than 2K bytes=\n" + ",\n" + ">> we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and sa=\n" + "ve\n" ">> them to a large buffer.\n" ">>\n" ">> Signed-off-by: Liu Shuo<Shuo.Liu@freescale.com>\n" ">> Signed-off-by: Shengzhou Liu<Shengzhou.Liu@freescale.com>\n" ">> Signed-off-by: Li Yang<leoli@freescale.com>\n" ">> ---\n" - ">> drivers/mtd/nand/fsl_elbc_nand.c | 216 +++++++++++++++++++++++++++++++++++---\n" + ">> drivers/mtd/nand/fsl_elbc_nand.c | 216 ++++++++++++++++++++++++++++=\n" + "+++++++---\n" ">> 1 files changed, 199 insertions(+), 17 deletions(-)\n" ">>\n" - ">> diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c\n" + ">> diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_e=\n" + "lbc_nand.c\n" ">> index c2c231b..415f87e 100644\n" ">> --- a/drivers/mtd/nand/fsl_elbc_nand.c\n" ">> +++ b/drivers/mtd/nand/fsl_elbc_nand.c\n" @@ -41,8 +46,9 @@ ">> \tstruct device *dev;\n" ">> \tint bank; /* Chip select bank number */\n" ">> \tu8 __iomem *vbase; /* Chip select base virtual address */\n" - ">> -\tint page_size; /* NAND page size (0=512, 1=2048) */\n" - ">> +\tint page_size; /* NAND page size (0=512, 1=2048, 2=4096...),\n" + ">> -\tint page_size; /* NAND page size (0=3D512, 1=3D2048) */\n" + ">> +\tint page_size; /* NAND page size (0=3D512, 1=3D2048, 2=3D40=\n" + "96...),\n" ">> +\t\t\t\t * the mutiple of 2048.\n" ">> +\t\t\t\t */\n" "> That \"...\" isn't very descriptive. What happens with 8192-byte pages?\n" @@ -50,14 +56,15 @@ ">\n" "> Please just get rid of this and use mtd->writesize.\n" ">\n" - ">> +\t\tfor (i = 1; i< priv->page_size; i++) {\n" + ">> +\t\tfor (i =3D 1; i< priv->page_size; i++) {\n" ">> +\t\t\t/*\n" ">> +\t\t\t * Maybe there are some reasons of FCM hardware timming,\n" ">> +\t\t\t * we must insert a FIR_OP_NOP(0x00) before FIR_OP_RB.\n" ">> +\t\t\t */\n" "> s/timming/timing/\n" ">\n" - ">> \t/* PAGEPROG reuses all of the setup from SEQIN and adds the length */\n" + ">> \t/* PAGEPROG reuses all of the setup from SEQIN and adds the length =\n" + "*/\n" ">> \tcase NAND_CMD_PAGEPROG: {\n" ">> +\t\tint len;\n" ">> \t\tdev_vdbg(priv->dev,\n" @@ -68,8 +75,8 @@ ">> \t\t * then set the exact length, otherwise use a full page\n" ">> \t\t * write so the HW generates the ECC.\n" ">> \t\t */\n" - ">> -\t\tif (elbc_fcm_ctrl->oob || elbc_fcm_ctrl->column != 0 ||\n" - ">> +\t\tif (elbc_fcm_ctrl->column>= mtd->writesize) {\n" + ">> -\t\tif (elbc_fcm_ctrl->oob || elbc_fcm_ctrl->column !=3D 0 ||\n" + ">> +\t\tif (elbc_fcm_ctrl->column>=3D mtd->writesize) {\n" ">> +\t\t\t/* write oob */\n" ">> +\t\t\tif (priv->page_size> 1) {\n" ">> +\t\t\t\t/* when pagesize of chip is greater than 2048,\n" @@ -85,93 +92,99 @@ "> discontiguous write?\n" ">\n" "I have no better way to implement it now.\n" - "Some chips have 'NOP' limitation, so I don't use the FIR_OP_UA to do a \n" + "Some chips have 'NOP' limitation, so I don't use the FIR_OP_UA to do a=20\n" "oob write.\n" - ">> +\t\t\t\tlen = 2112;\n" - "> len = min(elbc_fcm_ctrl->index, 2112);\n" - "when do a oob write (writesize > 2048), elbc_fcm_ctrl->index is greater \n" + ">> +\t\t\t\tlen =3D 2112;\n" + "> len =3D min(elbc_fcm_ctrl->index, 2112);\n" + "when do a oob write (writesize > 2048), elbc_fcm_ctrl->index is greater=20\n" "writesize\n" "(is 4096 at least).\n" ">> +\t\t\t} else\n" - ">> +\t\t\t\tlen = mtd->writesize + mtd->oobsize -\n" + ">> +\t\t\t\tlen =3D mtd->writesize + mtd->oobsize -\n" ">> +\t\t\t\t\telbc_fcm_ctrl->column;\n" ">> +\t\t\tout_be32(&lbc->fbcr, len);\n" - "> len = elbc_fcm_ctrl->index - elbc_fcm_ctrl->column;\n" + "> len =3D elbc_fcm_ctrl->index - elbc_fcm_ctrl->column;\n" ">\n" "> Use braces on both sides of the if/else if it's needed on one side.\n" - ">> +\t\t} else if (elbc_fcm_ctrl->column != 0 ||\n" - ">> \t\t elbc_fcm_ctrl->index != mtd->writesize + mtd->oobsize)\n" + ">> +\t\t} else if (elbc_fcm_ctrl->column !=3D 0 ||\n" + ">> \t\t elbc_fcm_ctrl->index !=3D mtd->writesize + mtd->oobsize)\n" ">> \t\t\tout_be32(&lbc->fbcr, elbc_fcm_ctrl->index);\n" "> This should have set fbcr to index - column as well (after adjusting --\n" "> though really it's not a supported use case. We should only be seeing\n" - "> column != 0 for oob.\n" + "> column !=3D 0 for oob.\n" ">\n" "I have make a independent to fix this issue.\n" "(In fact,documentation says FCM will stop automatically after\n" "reading the last byte of spare region)\n" - ">> @@ -625,10 +776,16 @@ static int fsl_elbc_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)\n" + ">> @@ -625,10 +776,16 @@ static int fsl_elbc_verify_buf(struct mtd_info *=\n" + "mtd, const u_char *buf, int len)\n" ">> \t\treturn -EINVAL;\n" ">> \t}\n" ">>\n" - ">> -\tfor (i = 0; i< len; i++)\n" + ">> -\tfor (i =3D 0; i< len; i++)\n" ">> -\t\tif (in_8(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index + i])\n" - ">> -\t\t\t\t!= buf[i])\n" + ">> -\t\t\t\t!=3D buf[i])\n" ">> -\t\t\tbreak;\n" ">> +\tif (mtd->writesize> 2048)\n" - ">> +\t\tfor (i = 0; i< len; i++)\n" + ">> +\t\tfor (i =3D 0; i< len; i++)\n" ">> +\t\t\tif (elbc_fcm_ctrl->buffer[elbc_fcm_ctrl->index + i]\n" - ">> +\t\t\t\t\t!= buf[i])\n" + ">> +\t\t\t\t\t!=3D buf[i])\n" ">> +\t\t\t\tbreak;\n" ">> +\telse\n" - ">> +\t\tfor (i = 0; i< len; i++)\n" + ">> +\t\tfor (i =3D 0; i< len; i++)\n" ">> +\t\t\tif (in_8(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index + i])\n" - ">> +\t\t\t\t\t!= buf[i])\n" + ">> +\t\t\t\t\t!=3D buf[i])\n" ">> +\t\t\t\tbreak;\n" "> Please use braces around multiline if/for bodies, even if they're\n" "> technically a single statement -- especially when you've got a dangling\n" "> else.\n" ">\n" - ">> \telbc_fcm_ctrl->index += len;\n" - ">> \treturn i == len&& elbc_fcm_ctrl->status == LTESR_CC ? 0 : -EIO;\n" - ">> @@ -657,6 +814,7 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)\n" - ">> \tstruct fsl_elbc_mtd *priv = chip->priv;\n" - ">> \tstruct fsl_lbc_ctrl *ctrl = priv->ctrl;\n" - ">> \tstruct fsl_lbc_regs __iomem *lbc = ctrl->regs;\n" - ">> +\tstruct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand;\n" + ">> \telbc_fcm_ctrl->index +=3D len;\n" + ">> \treturn i =3D=3D len&& elbc_fcm_ctrl->status =3D=3D LTESR_CC ? 0 : =\n" + "-EIO;\n" + ">> @@ -657,6 +814,7 @@ static int fsl_elbc_chip_init_tail(struct mtd_info=\n" + " *mtd)\n" + ">> \tstruct fsl_elbc_mtd *priv =3D chip->priv;\n" + ">> \tstruct fsl_lbc_ctrl *ctrl =3D priv->ctrl;\n" + ">> \tstruct fsl_lbc_regs __iomem *lbc =3D ctrl->regs;\n" + ">> +\tstruct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl =3D ctrl->nand;\n" ">> \tunsigned int al;\n" ">>\n" ">> \t/* calculate FMR Address Length field */\n" - ">> @@ -707,12 +865,17 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)\n" - ">> \tdev_dbg(priv->dev, \"fsl_elbc_init: mtd->oobsize = %d\\n\",\n" + ">> @@ -707,12 +865,17 @@ static int fsl_elbc_chip_init_tail(struct mtd_in=\n" + "fo *mtd)\n" + ">> \tdev_dbg(priv->dev, \"fsl_elbc_init: mtd->oobsize =3D %d\\n\",\n" ">> \t\tmtd->oobsize);\n" ">>\n" ">> +\tkfree(elbc_fcm_ctrl->buffer);\n" - ">> +\telbc_fcm_ctrl->buffer = NULL;\n" + ">> +\telbc_fcm_ctrl->buffer =3D NULL;\n" ">> +\n" ">> \t/* adjust Option Register and ECC to match Flash page size */\n" - ">> \tif (mtd->writesize == 512) {\n" - ">> \t\tpriv->page_size = 0;\n" + ">> \tif (mtd->writesize =3D=3D 512) {\n" + ">> \t\tpriv->page_size =3D 0;\n" ">> \t\tclrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);\n" - ">> -\t} else if (mtd->writesize == 2048) {\n" - ">> -\t\tpriv->page_size = 1;\n" - ">> +\t} else if (mtd->writesize>= 2048) {\n" - ">> +\t\t/* page_size = writesize / 2048 */\n" - ">> +\t\tpriv->page_size = mtd->writesize>> 11;\n" - "> Why not just write priv->page_size = mtd->writesize / 2048 in the code\n" + ">> -\t} else if (mtd->writesize =3D=3D 2048) {\n" + ">> -\t\tpriv->page_size =3D 1;\n" + ">> +\t} else if (mtd->writesize>=3D 2048) {\n" + ">> +\t\t/* page_size =3D writesize / 2048 */\n" + ">> +\t\tpriv->page_size =3D mtd->writesize>> 11;\n" + "> Why not just write priv->page_size =3D mtd->writesize / 2048 in the cod=\n" + "e\n" "> rather than the comment (it compiles to the same code)? Other than\n" "> because you were requested to remove priv->page_size, that is. :-)\n" ">\n" ">> \t\tsetbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);\n" ">> \t\t/* adjust ecc setup if needed */\n" - ">> \t\tif ((in_be32(&lbc->bank[priv->bank].br)& BR_DECC) ==\n" - ">> @@ -723,6 +886,14 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)\n" + ">> \t\tif ((in_be32(&lbc->bank[priv->bank].br)& BR_DECC) =3D=3D\n" + ">> @@ -723,6 +886,14 @@ static int fsl_elbc_chip_init_tail(struct mtd_inf=\n" + "o *mtd)\n" ">> \t\t\t\t\t&fsl_elbc_oob_lp_eccm0;\n" - ">> \t\t\tchip->badblock_pattern =&largepage_memorybased;\n" + ">> \t\t\tchip->badblock_pattern =3D&largepage_memorybased;\n" ">> \t\t}\n" ">> +\n" ">> +\t\t/* re-malloc if pagesize> 2048*/\n" ">> +\t\tif (mtd->writesize> 2048) {\n" - ">> +\t\t\telbc_fcm_ctrl->buffer = kmalloc(mtd->writesize +\n" + ">> +\t\t\telbc_fcm_ctrl->buffer =3D kmalloc(mtd->writesize +\n" ">> +\t\t\t\t\t\t mtd->oobsize, GFP_KERNEL);\n" ">> +\t\t\tif (!elbc_fcm_ctrl->buffer)\n" ">> +\t\t\t\treturn -ENOMEM;\n" @@ -179,18 +192,22 @@ ">> \t} else {\n" ">> \t\tdev_err(priv->dev,\n" ">> \t\t\t\"fsl_elbc_init: page size %d is not supported\\n\",\n" - "> buffer is a controller-wide resource, but you're setting it based on the\n" + "> buffer is a controller-wide resource, but you're setting it based on th=\n" + "e\n" "> most-recently-probed NAND chip. It should be large enough to\n" - "> accommodate the largest page size in use on any connected chip. Even if\n" + "> accommodate the largest page size in use on any connected chip. Even i=\n" + "f\n" "> all chips in the system have the same page size, you're introducing a\n" "> race if a previously-probed chip is already in use (the controller lock\n" "> is not held here).\n" ">\n" - "> Just allocate a buffer large enough for a 16K page size in the main init\n" + "> Just allocate a buffer large enough for a 16K page size in the main ini=\n" + "t\n" "> function, and print an error in the tail if you encounter a larger page\n" "> size.\n" ">\n" - ">> @@ -886,6 +1057,17 @@ static int __devinit fsl_elbc_nand_probe(struct platform_device *pdev)\n" + ">> @@ -886,6 +1057,17 @@ static int __devinit fsl_elbc_nand_probe(struct =\n" + "platform_device *pdev)\n" ">> \t\t\tgoto err;\n" ">> \t\t}\n" ">> \t\telbc_fcm_ctrl->counter++;\n" @@ -202,7 +219,7 @@ ">> +\t\t * don't know writesize before calling nand_scan(). We will\n" ">> +\t\t * re-malloc later if needed.\n" ">> +\t\t */\n" - ">> +\t\telbc_fcm_ctrl->buffer = kmalloc(4096 * 6, GFP_KERNEL);\n" + ">> +\t\telbc_fcm_ctrl->buffer =3D kmalloc(4096 * 6, GFP_KERNEL);\n" ">> +\t\tif (!elbc_fcm_ctrl->buffer)\n" ">> +\t\t\treturn -ENOMEM;\n" "> Clean up properly if you fail to allocate the buffer. This includes\n" @@ -211,4 +228,4 @@ "> -Scott\n" - LiuShuo -b1b1929e420cefcb3e0a19eae40e9cd28e57086480ae0cfc38a5eed5a7bc2e09 +01c277c1d422195ce559e898d6b58e543cba90beb367b595ae2b9f8ecff44319
diff --git a/a/content_digest b/N2/content_digest index 3f0743a..ec26529 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -6,15 +6,15 @@ "Subject\0Re: [PATCH v3 3/3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip\0" "Date\0Wed, 23 Nov 2011 20:14:11 +0800\0" "To\0Scott Wood <scottwood@freescale.com>\0" - "Cc\0Artem.Bityutskiy@nokia.com" - linuxppc-dev@lists.ozlabs.org - linux-kernel@vger.kernel.org + "Cc\0<dwmw2@infradead.org>" + <Artem.Bityutskiy@nokia.com> + <linux-mtd@lists.infradead.org> + <linuxppc-dev@lists.ozlabs.org> + <akpm@linux-foundation.org> + <linux-kernel@vger.kernel.org> + <leoli@freescale.com> Liu Shuo <Shuo.Liu@freescale.com> - Shengzhou Liu <Shengzhou.Liu@freescale.com> - linux-mtd@lists.infradead.org - akpm@linux-foundation.org - leoli@freescale.com - " dwmw2@infradead.org\0" + " Shengzhou Liu <Shengzhou.Liu@freescale.com>\0" "\00:1\0" "b\0" "\344\272\216 2011\345\271\26411\346\234\21023\346\227\245 07:55, Scott Wood \345\206\231\351\201\223:\n" @@ -211,4 +211,4 @@ "> -Scott\n" - LiuShuo -b1b1929e420cefcb3e0a19eae40e9cd28e57086480ae0cfc38a5eed5a7bc2e09 +988d4dfccf952ee1f46cbd9c496445e6d67d7505de05445131b303ee9204cf09
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