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Subject: Re: [Qemu-devel] Status of the SH4 / ARM7 emulators
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To: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>, Renato Utsch <renatoutsch@gmail.com>, qemu-devel@nongnu.org

Am 23.11.2011 22:59, schrieb Richard Henderson:
> On 11/20/2011 12:51 PM, Andreas Färber wrote:
>> * Part of the problem is that common CPUState fields are not at the
>> start of the struct. I have therefore been playing with a
>> CPU_COMMON_PREFIX at the start of the struct and using a macro for
>> clearing on reset, which preserves part of the common prefix fields.
> 
> Most of the RISC hosts have a limited displacement in their load and
> store instructions.  E.g. 14 bits for Sparc, 12 bits for ARM, 10.
> We want to be able to load and store the target cpu registers very
> efficiently.
> 
> If you move all the common fields to the beginning, that will include
> the (rather large) TLB tables, and overflow those small offsets.
> 
> This change would almost certainly be a Large Mistake.

Then what is your suggestion?

Today, common code is accessing env-> struct members directly for
icount, TLB, etc. If they're at the end of the struct, offsets vary and
we can't cast to a common-subset struct.

Anthony's qom-upstream.4 branch doesn't seem to touch CPUState yet.
Having an empty C++ base class with virtual, non-implemented accessor
methods that are implemented for each arch is the only solution I can
think of other than "proxy" functions with large switches based on a
common (=prefixed) type field.

Andreas