From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: ARM, MMU and IO space mapping
Date: Thu, 24 Nov 2011 15:23:18 +0100 [thread overview]
Message-ID: <4ECE5356.5060904@pengutronix.de> (raw)
In-Reply-To: <20111124120400.GC27267@pengutronix.de>
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On 11/24/2011 01:04 PM, Sascha Hauer wrote:
> On Thu, Nov 24, 2011 at 12:24:55PM +0100, Robert Jarzmik wrote:
>> Hi,
>>
>> I was wandering in the MMU arm implementation and I'm wondering if anybody is
>> using it and accessing some IO mapped space.
>>
>> My trouble is that mmu_init() only maps the RAM space (and with cacheable memory
>> type). For the PXA, I would need a non-cacheable non-bufferable memory type,
>> which could be allocated either :
>> - through dev_request_mem_region(), which would be amended for the MMU case
>> - or through a dedicated ioremap() function, which will be empty in no MMU case
>>
>> The current issue I'm facing is that when I launch barebox with MMU enabled, the
>> UDC device doesn't work (I presume because the IO space is not mapped into the
>> MMU). This prevents me from using barebox in MMU context (and therefore I have
>> no D-Cache).
>>
>> Would the evolution of dev_request_mem_region() be acceptable, or should I
>> consider another way ?
>
> The generic arm code sets up a flat 1:1 noncached mapping. Then it
> remaps the SDRAM cacheable/bufferable. So a normal driver can just
> access the registers without worrying about ioremap() since they are
> outside of the SDRAM. What you need in your udc driver is either
> dma_alloc_coherent which allocates a chunk of SDRAM and remaps it
> uncacheable/unbufferable or you have to sync manually using
> dma_clean_range/dma_flush_range. See drivers/usb/gadget/fsl_udc.c or
> drivers/net/fec_imx.c for examples.
>
> I remember Marc had some trouble with the mmu/cache implementation on
> PXA. I don't know the details though. Maybe you have to dig through
> the manuals/kernel code to find out the differences between the normal
> arm v5 and pxa.
I had some troubles with the cache setup, but it was before Sascha fixed
a problem with the v5 chache handling. IIRC loading the environment form
NOR sometimes failed with enabled caches.
cheers, Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
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next prev parent reply other threads:[~2011-11-24 14:23 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-24 11:24 ARM, MMU and IO space mapping Robert Jarzmik
2011-11-24 12:04 ` Sascha Hauer
2011-11-24 14:23 ` Marc Kleine-Budde [this message]
2011-11-24 20:09 ` Robert Jarzmik
2011-11-24 20:25 ` Marc Kleine-Budde
2011-11-25 0:01 ` Sascha Hauer
2011-11-27 22:30 ` Robert Jarzmik
2011-11-28 7:43 ` Sascha Hauer
2011-11-28 17:43 ` Robert Jarzmik
2011-11-29 8:15 ` Sascha Hauer
2011-11-30 22:06 ` Robert Jarzmik
2011-12-01 14:26 ` Sascha Hauer
2011-12-01 14:34 ` Marc Kleine-Budde
2011-12-11 13:01 ` Robert Jarzmik
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