From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:43508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RUg7b-0003kj-6Q for qemu-devel@nongnu.org; Sun, 27 Nov 2011 09:54:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RUg7a-0007vT-7q for qemu-devel@nongnu.org; Sun, 27 Nov 2011 09:54:23 -0500 Received: from cantor2.suse.de ([195.135.220.15]:49673 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RUg7a-0007vJ-2d for qemu-devel@nongnu.org; Sun, 27 Nov 2011 09:54:22 -0500 Message-ID: <4ED24EF7.4050704@suse.de> Date: Sun, 27 Nov 2011 15:53:43 +0100 From: =?ISO-8859-1?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <4ED24545.1060902@suse.de> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] cpu_regs in target-i386 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Xin Tong Cc: qemu-devel Am 27.11.2011 15:36, schrieb Xin Tong: > If i understand correctly here, those are just array of offsets for > the emulated registers such that the tcg can easily get access to the > address of the emulated registers. This is, however, different from > the env (CPUx86State) variable which will always have a host register > pointing to it ( host register is made to point to env in the tb enter > prologue). Yes: host register pointed to by cpu_env contains address of env + offset stored in cpu_* variable =3D address of corresponding struct member in env Andreas > On Sun, Nov 27, 2011 at 9:12 AM, Andreas F=E4rber wr= ote: >> Am 27.11.2011 14:46, schrieb Xin Tong: >>> When the x86 vcpu is initialized, a CPUX86State is qemu_mallocz'ed. >>> env is used to point to it and modifications to the CPUX86State can >>> thereby be done via the register that contains the env. I do not get >>> what the cpu_regs[CPU_NB_REGS] are for, do not we already have a set >>> of emulated x86 registers when we allocate the CPUX86State ? >> >> I assume in i386, too, it will be a TCGv array and will be initialized >> to point to individual memory offsets inside CPU*State. >> So they're for convenience and readability. >> >> HTE, >> Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg