From: Scott Wood <scottwood@freescale.com>
To: Timur Tabi <timur@freescale.com>
Cc: linuxppc-dev@ozlabs.org, kumar.gala@freescale.com
Subject: Re: [PATCH 2/2] powerpc/85xx: create 32-bit DTS for the P1022DS
Date: Wed, 7 Dec 2011 18:08:10 -0600 [thread overview]
Message-ID: <4EDFFFEA.5030603@freescale.com> (raw)
In-Reply-To: <1323302665-26461-2-git-send-email-timur@freescale.com>
On 12/07/2011 06:04 PM, Timur Tabi wrote:
> + /*
> + * This node is used to access the pixis via "indirect" mode,
> + * which is done by writing the pixis register index to chip
> + * select 0 and the value to/from chip select 1. Indirect
> + * mode is the only way to access the pixis when DIU video
> + * is enabled. Note that this assumes that the first column
> + * of the 'ranges' property above is the chip select number.
> + */
> + board-control@0,0 {
> + compatible = "fsl,p1022ds-indirect-pixis";
> + reg = <0x0 0x0 1 /* CS0 */
> + 0x1 0x0 1>; /* CS1 */
> + };
[snip]
> + board-control@3,0 {
> + compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
> + reg = <3 0 0x30>;
> + interrupt-parent = <&mpic>;
> + /*
> + * IRQ8 is generated if the "EVENT" switch is pressed
> + * and PX_CTL[EVESEL] is set to 00.
> + */
> + interrupts = <8 8 0 0>;
> + };
It's not new to this patch, but... what does "8" mean in the second cell
of an mpic interrupt specifier? And why does the indirect pixis node
not have the interrupt?
-Scott
next prev parent reply other threads:[~2011-12-08 0:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-08 0:04 [PATCH 1/2] [v2] powerpc/85xx: p1022ds: disable the NOR flash node if video is enabled Timur Tabi
2011-12-08 0:04 ` [PATCH 2/2] powerpc/85xx: create 32-bit DTS for the P1022DS Timur Tabi
2011-12-08 0:08 ` Scott Wood [this message]
2011-12-08 1:05 ` Tabi Timur-B04825
2011-12-08 17:51 ` Scott Wood
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