From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14] helo=TX2EHSOBE009.bigfish.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1RZ62k-0005RV-MF for linux-mtd@lists.infradead.org; Fri, 09 Dec 2011 19:23:39 +0000 Message-ID: <4EE26035.60408@freescale.com> Date: Fri, 9 Dec 2011 13:23:33 -0600 From: Scott Wood MIME-Version: 1.0 To: Subject: Re: [PATCH 1/2] mtd/nand : set Nand flash page address to FBAR and FPAR correctly References: <1323423775-26951-1-git-send-email-shuo.liu@freescale.com> In-Reply-To: <1323423775-26951-1-git-send-email-shuo.liu@freescale.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: Artem.Bityutskiy@nokia.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, akpm@linux-foundation.org, leoli@freescale.com, dwmw2@infradead.org List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 12/09/2011 03:42 AM, shuo.liu@freescale.com wrote: > From: Liu Shuo > > If we use the Nand flash chip whose number of pages in a block is greater > than 64(for large page), we must treat the low bit of FBAR as being the > high bit of the page address due to the limitation of FCM, it simply uses > the low 6-bits (for large page) of the combined block/page address as the > FPAR component, rather than considering the actual block size. > > Signed-off-by: Liu Shuo > Signed-off-by: Jerry Huang > Signed-off-by: Tang Yuantian > Signed-off-by: Li Yang > --- > drivers/mtd/nand/fsl_elbc_nand.c | 13 ++++++++++--- > 1 files changed, 10 insertions(+), 3 deletions(-) Acked-by: Scott Wood -Scott From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from TX2EHSOBE009.bigfish.com (tx2ehsobe004.messaging.microsoft.com [65.55.88.14]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 7B9D61007D7 for ; Sat, 10 Dec 2011 06:23:41 +1100 (EST) Message-ID: <4EE26035.60408@freescale.com> Date: Fri, 9 Dec 2011 13:23:33 -0600 From: Scott Wood MIME-Version: 1.0 To: Subject: Re: [PATCH 1/2] mtd/nand : set Nand flash page address to FBAR and FPAR correctly References: <1323423775-26951-1-git-send-email-shuo.liu@freescale.com> In-Reply-To: <1323423775-26951-1-git-send-email-shuo.liu@freescale.com> Content-Type: text/plain; charset="UTF-8" Cc: Artem.Bityutskiy@nokia.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, akpm@linux-foundation.org, dwmw2@infradead.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 12/09/2011 03:42 AM, shuo.liu@freescale.com wrote: > From: Liu Shuo > > If we use the Nand flash chip whose number of pages in a block is greater > than 64(for large page), we must treat the low bit of FBAR as being the > high bit of the page address due to the limitation of FCM, it simply uses > the low 6-bits (for large page) of the combined block/page address as the > FPAR component, rather than considering the actual block size. > > Signed-off-by: Liu Shuo > Signed-off-by: Jerry Huang > Signed-off-by: Tang Yuantian > Signed-off-by: Li Yang > --- > drivers/mtd/nand/fsl_elbc_nand.c | 13 ++++++++++--- > 1 files changed, 10 insertions(+), 3 deletions(-) Acked-by: Scott Wood -Scott From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754623Ab1LITXj (ORCPT ); Fri, 9 Dec 2011 14:23:39 -0500 Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14]:50693 "EHLO TX2EHSOBE009.bigfish.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751342Ab1LITXi (ORCPT ); Fri, 9 Dec 2011 14:23:38 -0500 X-SpamScore: -11 X-BigFish: VS-11(zzbb2dI9371I1432N98dKzz1202hzz8275bhz2dh2a8h668h839h93fh61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190;KIP:(null);UIP:(null);IPV:NLI;H:mail.freescale.net;RD:none;EFVD:NLI Message-ID: <4EE26035.60408@freescale.com> Date: Fri, 9 Dec 2011 13:23:33 -0600 From: Scott Wood User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:6.0.2) Gecko/20110906 Thunderbird/6.0.2 MIME-Version: 1.0 To: CC: , , , , , , Subject: Re: [PATCH 1/2] mtd/nand : set Nand flash page address to FBAR and FPAR correctly References: <1323423775-26951-1-git-send-email-shuo.liu@freescale.com> In-Reply-To: <1323423775-26951-1-git-send-email-shuo.liu@freescale.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-OriginatorOrg: freescale.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/09/2011 03:42 AM, shuo.liu@freescale.com wrote: > From: Liu Shuo > > If we use the Nand flash chip whose number of pages in a block is greater > than 64(for large page), we must treat the low bit of FBAR as being the > high bit of the page address due to the limitation of FCM, it simply uses > the low 6-bits (for large page) of the combined block/page address as the > FPAR component, rather than considering the actual block size. > > Signed-off-by: Liu Shuo > Signed-off-by: Jerry Huang > Signed-off-by: Tang Yuantian > Signed-off-by: Li Yang > --- > drivers/mtd/nand/fsl_elbc_nand.c | 13 ++++++++++--- > 1 files changed, 10 insertions(+), 3 deletions(-) Acked-by: Scott Wood -Scott