From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: fsincos emulation on AMD CPUs Date: Thu, 15 Dec 2011 11:34:07 +0100 Message-ID: <4EE9CD1F.1020406@redhat.com> References: <4EE9C01902000078000680CD@nat28.tlf.novell.com> <4EE9D6E40200007800068120@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4EE9D6E40200007800068120@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jan Beulich Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org On 12/15/2011 11:15 AM, Jan Beulich wrote: >> > If you really cared, perhaps fsincos can be replaced by this sequence in >> > the emulator: >> > >> > ; x >> > fld %st ; x x >> > fsin ; x sin(x) >> > fxch %st(1) ; sin(x) x >> > fcos ; sin(x) cos(x) > I had thought of this at first too, but this is problematic in terms of > exception handling: fpu_handle_exception() expects to see an > exception only on the very first instruction (as it's assumed to be > the only one), and aborts the rest of the sequence if the exception > doesn't happen on the last instruction. Can it just be (%0 is fic.insn_bytes): movb $4f-1f,%0 ; do nothing on exception here 1: fld %st ; x x movb $3f-1f,%0 ; pop on exception here 1: fsin ; x sin(x) fxch %st(1) ; sin(x) x movb $2f-1f,%0 ; xch+pop on exception here 1: fcos ; sin(x) cos(x) jmp 2f 4: fxch %st(1) ; x sin(x) 3: fstp %st ; x 2: Paolo