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diff for duplicates of <4EF0496C.7060504@samsung.com>

diff --git a/a/1.txt b/N1/1.txt
index 678c062..8ef8883 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -304,7 +304,7 @@ index 0000000..c867cd0
 +		if (!lcd_dev)
 +			continue;
 +
-+		if ((strcmp(lcd_drv->name, lcd_dev->name)) = 0) {
++		if ((strcmp(lcd_drv->name, lcd_dev->name)) == 0) {
 +			/**
 +			 * bus_id would be used to identify
 +			 * connected bus.
@@ -377,7 +377,7 @@ index 0000000..c867cd0
 +		dev_dbg(dsim->dev, "lcd_dev->bus_id = %d, dsim->id = %d\n",
 +				lcd_dev->bus_id, dsim->id);
 +
-+		if ((strcmp(lcd_drv->name, name) = 0)) {
++		if ((strcmp(lcd_drv->name, name) == 0)) {
 +			lcd_dev->master = dsim;
 +
 +			lcd_dev->dev.parent = dsim->dev;
@@ -438,13 +438,13 @@ index 0000000..c867cd0
 +
 +	/* get mipi_dsim_platform_data. */
 +	dsim_pd = (struct mipi_dsim_platform_data *)dsim->pd;
-+	if (dsim_pd = NULL) {
++	if (dsim_pd == NULL) {
 +		dev_err(&pdev->dev, "failed to get platform data for dsim.\n");
 +		return -EFAULT;
 +	}
 +	/* get mipi_dsim_config. */
 +	dsim_config = dsim_pd->dsim_config;
-+	if (dsim_config = NULL) {
++	if (dsim_config == NULL) {
 +		dev_err(&pdev->dev, "failed to get dsim config data.\n");
 +		return -EFAULT;
 +	}
@@ -549,7 +549,7 @@ index 0000000..c867cd0
 +	platform_set_drvdata(pdev, dsim);
 +
 +	dev_dbg(&pdev->dev, "mipi-dsi driver(%s mode) has been probed.\n",
-+		(dsim_config->e_interface = DSIM_COMMAND) ?
++		(dsim_config->e_interface == DSIM_COMMAND) ?
 +			"CPU" : "RGB");
 +
 +	return 0;
@@ -826,7 +826,7 @@ index 0000000..46fe2a7
 +		 * send remainder data less then 4.
 +		 */
 +		if ((data_size - data_cnt) < 4) {
-+			if ((data_size - data_cnt) = 3) {
++			if ((data_size - data_cnt) == 3) {
 +				payload = data0[data_cnt] |
 +				    data0[data_cnt + 1] << 8 |
 +					data0[data_cnt + 2] << 16;
@@ -834,14 +834,14 @@ index 0000000..46fe2a7
 +				payload, data0[data_cnt],
 +				data0[data_cnt + 1],
 +				data0[data_cnt + 2]);
-+			} else if ((data_size - data_cnt) = 2) {
++			} else if ((data_size - data_cnt) == 2) {
 +				payload = data0[data_cnt] |
 +					data0[data_cnt + 1] << 8;
 +			dev_dbg(dsim->dev,
 +				"count = 2 payload = %x, %x %x\n", payload,
 +				data0[data_cnt],
 +				data0[data_cnt + 1]);
-+			} else if ((data_size - data_cnt) = 1) {
++			} else if ((data_size - data_cnt) == 1) {
 +				payload = data0[data_cnt];
 +			}
 +
@@ -870,7 +870,7 @@ index 0000000..46fe2a7
 +{
 +	unsigned int check_rx_ack = 0;
 +
-+	if (dsim->state = DSIM_STATE_ULPS) {
++	if (dsim->state == DSIM_STATE_ULPS) {
 +		dev_err(dsim->dev, "state is ULPS.\n");
 +
 +		return -EINVAL;
@@ -1019,7 +1019,8 @@ index 0000000..46fe2a7
 +		rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);
 +		dev_dbg(dsim->dev, "received pkt : %08x\n", rcv_pkt);
 +		for (j = 0; j < 4; j++) {
-+			rx_buf[(i * 4) + j] +					(u8)(rcv_pkt >> (j * 8)) & 0xff;
++			rx_buf[(i * 4) + j] =
++					(u8)(rcv_pkt >> (j * 8)) & 0xff;
 +			dev_dbg(dsim->dev, "received value : %02x\n",
 +					(rcv_pkt >> (j * 8)) & 0xff);
 +		}
@@ -1028,7 +1029,8 @@ index 0000000..46fe2a7
 +		rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);
 +		dev_dbg(dsim->dev, "received pkt : %08x\n", rcv_pkt);
 +		for (j = 0; j < (rxsize % 4); j++) {
-+			rx_buf[(i * 4) + j] +					(u8)(rcv_pkt >> (j * 8)) & 0xff;
++			rx_buf[(i * 4) + j] =
++					(u8)(rcv_pkt >> (j * 8)) & 0xff;
 +			dev_dbg(dsim->dev, "received value : %02x\n",
 +					(rcv_pkt >> (j * 8)) & 0xff);
 +		}
@@ -1065,7 +1067,7 @@ index 0000000..46fe2a7
 +	u8 response = 0;
 +	u16 rxsize;
 +
-+	if (dsim->state = DSIM_STATE_ULPS) {
++	if (dsim->state == DSIM_STATE_ULPS) {
 +		dev_err(dsim->dev, "state is ULPS.\n");
 +
 +		return -EINVAL;
@@ -1147,7 +1149,7 @@ index 0000000..46fe2a7
 +	i = 0;
 +	while (1) {
 +		rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);
-+		if ((rcv_pkt = MIPI_RX_FIFO_READ_DONE)
++		if ((rcv_pkt == MIPI_RX_FIFO_READ_DONE)
 +				|| (i > MIPI_MAX_RX_FIFO))
 +			break;
 +		dev_dbg(dsim->dev,
@@ -1175,7 +1177,7 @@ index 0000000..46fe2a7
 +			sw_timeout--;
 +			if (s5p_mipi_dsi_is_pll_stable(dsim))
 +				return 0;
-+			if (sw_timeout = 0)
++			if (sw_timeout == 0)
 +				return -EINVAL;
 +		}
 +	} else
@@ -1282,11 +1284,11 @@ index 0000000..46fe2a7
 +		s5p_mipi_dsi_set_byte_clock_src(dsim, byte_clk_sel);
 +
 +		/* DPHY, DSIM Link : D-PHY clock out */
-+		if (byte_clk_sel = DSIM_PLL_OUT_DIV8) {
++		if (byte_clk_sel == DSIM_PLL_OUT_DIV8) {
 +			hs_clk = s5p_mipi_dsi_change_pll(dsim,
 +				dsim->dsim_config->p, dsim->dsim_config->m,
 +				dsim->dsim_config->s);
-+			if (hs_clk = 0) {
++			if (hs_clk == 0) {
 +				dev_err(dsim->dev,
 +					"failed to get hs clock.\n");
 +				return -EINVAL;
@@ -1296,11 +1298,11 @@ index 0000000..46fe2a7
 +			s5p_mipi_dsi_enable_pll_bypass(dsim, 0);
 +			s5p_mipi_dsi_pll_on(dsim, 1);
 +		/* DPHY : D-PHY clock out, DSIM link : external clock out */
-+		} else if (byte_clk_sel = DSIM_EXT_CLK_DIV8) {
++		} else if (byte_clk_sel == DSIM_EXT_CLK_DIV8) {
 +			dev_warn(dsim->dev, "this project is not support\n");
 +			dev_warn(dsim->dev,
 +				"external clock source for MIPI DSIM.\n");
-+		} else if (byte_clk_sel = DSIM_EXT_CLK_BYPASS) {
++		} else if (byte_clk_sel == DSIM_EXT_CLK_BYPASS) {
 +			dev_warn(dsim->dev, "this project is not support\n");
 +			dev_warn(dsim->dev,
 +				"external clock source for MIPI DSIM\n");
@@ -1357,7 +1359,7 @@ index 0000000..46fe2a7
 +		/* disable escape clock. */
 +		s5p_mipi_dsi_enable_byte_clock(dsim, 0);
 +
-+		if (byte_clk_sel = DSIM_PLL_OUT_DIV8)
++		if (byte_clk_sel == DSIM_PLL_OUT_DIV8)
 +			s5p_mipi_dsi_pll_on(dsim, 0);
 +	}
 +
@@ -1436,8 +1438,8 @@ index 0000000..46fe2a7
 +	timing = (struct fb_videomode *)dsim_pd->lcd_panel_info;
 +
 +	/* in case of VIDEO MODE (RGB INTERFACE), it sets polarities. */
-+	if (dsim_config->e_interface = (u32) DSIM_VIDEO) {
-+		if (dsim_config->auto_vertical_cnt = 0) {
++	if (dsim_config->e_interface == (u32) DSIM_VIDEO) {
++		if (dsim_config->auto_vertical_cnt == 0) {
 +			s5p_mipi_dsi_set_main_disp_vporch(dsim,
 +				dsim_config->cmd_allow,
 +				timing->upper_margin,
@@ -1456,7 +1458,7 @@ index 0000000..46fe2a7
 +
 +	s5p_mipi_dsi_display_config(dsim, dsim_config);
 +
-+	dev_info(dsim->dev, "lcd panel => width = %d, height = %d\n",
++	dev_info(dsim->dev, "lcd panel ==> width = %d, height = %d\n",
 +			timing->xres, timing->yres);
 +
 +	return 0;
@@ -1481,7 +1483,7 @@ index 0000000..46fe2a7
 +		/* check clock and data lane state are stop state */
 +		while (!(s5p_mipi_dsi_is_lane_state(dsim))) {
 +			time_out--;
-+			if (time_out = 0) {
++			if (time_out == 0) {
 +				dev_err(dsim->dev,
 +					"DSI Master is not stop state.\n");
 +				dev_err(dsim->dev,
@@ -1517,7 +1519,7 @@ index 0000000..46fe2a7
 +
 +int s5p_mipi_dsi_set_hs_enable(struct mipi_dsim_device *dsim)
 +{
-+	if (dsim->state = DSIM_STATE_STOP) {
++	if (dsim->state == DSIM_STATE_STOP) {
 +		if (dsim->e_clk_src != DSIM_EXT_CLK_BYPASS) {
 +			dsim->state = DSIM_STATE_HSCLKEN;
 +
@@ -1548,7 +1550,7 @@ index 0000000..46fe2a7
 +
 +		s5p_mipi_dsi_set_lcdc_transfer_mode(dsim, 0);
 +	} else {
-+		if (dsim->state = DSIM_STATE_INIT || dsim->state =
++		if (dsim->state == DSIM_STATE_INIT || dsim->state ==
 +			DSIM_STATE_ULPS) {
 +			dev_err(dsim->dev,
 +				"DSI Master is not STOP or HSDT state.\n");
@@ -1888,9 +1890,9 @@ index 0000000..3af1e82
 +		~((0x3 << 26) | (1 << 25) | (0x3 << 18) | (0x7 << 12) |
 +		(0x3 << 16) | (0x7 << 8));
 +
-+	if (dsim_config->e_interface = DSIM_VIDEO)
++	if (dsim_config->e_interface == DSIM_VIDEO)
 +		reg |= (1 << 25);
-+	else if (dsim_config->e_interface = DSIM_COMMAND)
++	else if (dsim_config->e_interface == DSIM_COMMAND)
 +		reg &= ~(1 << 25);
 +	else {
 +		dev_err(dsim->dev, "unknown lcd type.\n");
@@ -2719,7 +2721,8 @@ index 0000000..a6d3b01
 +	enum mipi_dsim_byte_clk_src	e_byte_clk;
 +
 +	/*
-+	 * =====================+	 * |    P    |    M    |    S    |    MHz    |
++	 * ===========================================
++	 * |    P    |    M    |    S    |    MHz    |
 +	 * -------------------------------------------
 +	 * |    3    |   100   |    3    |    100    |
 +	 * |    3    |   100   |    2    |    200    |
diff --git a/a/content_digest b/N1/content_digest
index 9bd2493..7a9a1ec 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,6 +1,6 @@
- "From\0Donghwa Lee <dh09.lee@samsung.com>\0"
+ "From\0dh09.lee@samsung.com (Donghwa Lee)\0"
  "Subject\0[PATCH v4] video: support MIPI-DSI controller driver\0"
- "Date\0Tue, 20 Dec 2011 08:38:04 +0000\0"
+ "Date\0Tue, 20 Dec 2011 17:38:04 +0900\0"
  "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
@@ -310,7 +310,7 @@
  "+\t\tif (!lcd_dev)\n"
  "+\t\t\tcontinue;\n"
  "+\n"
- "+\t\tif ((strcmp(lcd_drv->name, lcd_dev->name)) = 0) {\n"
+ "+\t\tif ((strcmp(lcd_drv->name, lcd_dev->name)) == 0) {\n"
  "+\t\t\t/**\n"
  "+\t\t\t * bus_id would be used to identify\n"
  "+\t\t\t * connected bus.\n"
@@ -383,7 +383,7 @@
  "+\t\tdev_dbg(dsim->dev, \"lcd_dev->bus_id = %d, dsim->id = %d\\n\",\n"
  "+\t\t\t\tlcd_dev->bus_id, dsim->id);\n"
  "+\n"
- "+\t\tif ((strcmp(lcd_drv->name, name) = 0)) {\n"
+ "+\t\tif ((strcmp(lcd_drv->name, name) == 0)) {\n"
  "+\t\t\tlcd_dev->master = dsim;\n"
  "+\n"
  "+\t\t\tlcd_dev->dev.parent = dsim->dev;\n"
@@ -444,13 +444,13 @@
  "+\n"
  "+\t/* get mipi_dsim_platform_data. */\n"
  "+\tdsim_pd = (struct mipi_dsim_platform_data *)dsim->pd;\n"
- "+\tif (dsim_pd = NULL) {\n"
+ "+\tif (dsim_pd == NULL) {\n"
  "+\t\tdev_err(&pdev->dev, \"failed to get platform data for dsim.\\n\");\n"
  "+\t\treturn -EFAULT;\n"
  "+\t}\n"
  "+\t/* get mipi_dsim_config. */\n"
  "+\tdsim_config = dsim_pd->dsim_config;\n"
- "+\tif (dsim_config = NULL) {\n"
+ "+\tif (dsim_config == NULL) {\n"
  "+\t\tdev_err(&pdev->dev, \"failed to get dsim config data.\\n\");\n"
  "+\t\treturn -EFAULT;\n"
  "+\t}\n"
@@ -555,7 +555,7 @@
  "+\tplatform_set_drvdata(pdev, dsim);\n"
  "+\n"
  "+\tdev_dbg(&pdev->dev, \"mipi-dsi driver(%s mode) has been probed.\\n\",\n"
- "+\t\t(dsim_config->e_interface = DSIM_COMMAND) ?\n"
+ "+\t\t(dsim_config->e_interface == DSIM_COMMAND) ?\n"
  "+\t\t\t\"CPU\" : \"RGB\");\n"
  "+\n"
  "+\treturn 0;\n"
@@ -832,7 +832,7 @@
  "+\t\t * send remainder data less then 4.\n"
  "+\t\t */\n"
  "+\t\tif ((data_size - data_cnt) < 4) {\n"
- "+\t\t\tif ((data_size - data_cnt) = 3) {\n"
+ "+\t\t\tif ((data_size - data_cnt) == 3) {\n"
  "+\t\t\t\tpayload = data0[data_cnt] |\n"
  "+\t\t\t\t    data0[data_cnt + 1] << 8 |\n"
  "+\t\t\t\t\tdata0[data_cnt + 2] << 16;\n"
@@ -840,14 +840,14 @@
  "+\t\t\t\tpayload, data0[data_cnt],\n"
  "+\t\t\t\tdata0[data_cnt + 1],\n"
  "+\t\t\t\tdata0[data_cnt + 2]);\n"
- "+\t\t\t} else if ((data_size - data_cnt) = 2) {\n"
+ "+\t\t\t} else if ((data_size - data_cnt) == 2) {\n"
  "+\t\t\t\tpayload = data0[data_cnt] |\n"
  "+\t\t\t\t\tdata0[data_cnt + 1] << 8;\n"
  "+\t\t\tdev_dbg(dsim->dev,\n"
  "+\t\t\t\t\"count = 2 payload = %x, %x %x\\n\", payload,\n"
  "+\t\t\t\tdata0[data_cnt],\n"
  "+\t\t\t\tdata0[data_cnt + 1]);\n"
- "+\t\t\t} else if ((data_size - data_cnt) = 1) {\n"
+ "+\t\t\t} else if ((data_size - data_cnt) == 1) {\n"
  "+\t\t\t\tpayload = data0[data_cnt];\n"
  "+\t\t\t}\n"
  "+\n"
@@ -876,7 +876,7 @@
  "+{\n"
  "+\tunsigned int check_rx_ack = 0;\n"
  "+\n"
- "+\tif (dsim->state = DSIM_STATE_ULPS) {\n"
+ "+\tif (dsim->state == DSIM_STATE_ULPS) {\n"
  "+\t\tdev_err(dsim->dev, \"state is ULPS.\\n\");\n"
  "+\n"
  "+\t\treturn -EINVAL;\n"
@@ -1025,7 +1025,8 @@
  "+\t\trcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);\n"
  "+\t\tdev_dbg(dsim->dev, \"received pkt : %08x\\n\", rcv_pkt);\n"
  "+\t\tfor (j = 0; j < 4; j++) {\n"
- "+\t\t\trx_buf[(i * 4) + j] +\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n"
+ "+\t\t\trx_buf[(i * 4) + j] =\n"
+ "+\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n"
  "+\t\t\tdev_dbg(dsim->dev, \"received value : %02x\\n\",\n"
  "+\t\t\t\t\t(rcv_pkt >> (j * 8)) & 0xff);\n"
  "+\t\t}\n"
@@ -1034,7 +1035,8 @@
  "+\t\trcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);\n"
  "+\t\tdev_dbg(dsim->dev, \"received pkt : %08x\\n\", rcv_pkt);\n"
  "+\t\tfor (j = 0; j < (rxsize % 4); j++) {\n"
- "+\t\t\trx_buf[(i * 4) + j] +\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n"
+ "+\t\t\trx_buf[(i * 4) + j] =\n"
+ "+\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n"
  "+\t\t\tdev_dbg(dsim->dev, \"received value : %02x\\n\",\n"
  "+\t\t\t\t\t(rcv_pkt >> (j * 8)) & 0xff);\n"
  "+\t\t}\n"
@@ -1071,7 +1073,7 @@
  "+\tu8 response = 0;\n"
  "+\tu16 rxsize;\n"
  "+\n"
- "+\tif (dsim->state = DSIM_STATE_ULPS) {\n"
+ "+\tif (dsim->state == DSIM_STATE_ULPS) {\n"
  "+\t\tdev_err(dsim->dev, \"state is ULPS.\\n\");\n"
  "+\n"
  "+\t\treturn -EINVAL;\n"
@@ -1153,7 +1155,7 @@
  "+\ti = 0;\n"
  "+\twhile (1) {\n"
  "+\t\trcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);\n"
- "+\t\tif ((rcv_pkt = MIPI_RX_FIFO_READ_DONE)\n"
+ "+\t\tif ((rcv_pkt == MIPI_RX_FIFO_READ_DONE)\n"
  "+\t\t\t\t|| (i > MIPI_MAX_RX_FIFO))\n"
  "+\t\t\tbreak;\n"
  "+\t\tdev_dbg(dsim->dev,\n"
@@ -1181,7 +1183,7 @@
  "+\t\t\tsw_timeout--;\n"
  "+\t\t\tif (s5p_mipi_dsi_is_pll_stable(dsim))\n"
  "+\t\t\t\treturn 0;\n"
- "+\t\t\tif (sw_timeout = 0)\n"
+ "+\t\t\tif (sw_timeout == 0)\n"
  "+\t\t\t\treturn -EINVAL;\n"
  "+\t\t}\n"
  "+\t} else\n"
@@ -1288,11 +1290,11 @@
  "+\t\ts5p_mipi_dsi_set_byte_clock_src(dsim, byte_clk_sel);\n"
  "+\n"
  "+\t\t/* DPHY, DSIM Link : D-PHY clock out */\n"
- "+\t\tif (byte_clk_sel = DSIM_PLL_OUT_DIV8) {\n"
+ "+\t\tif (byte_clk_sel == DSIM_PLL_OUT_DIV8) {\n"
  "+\t\t\ths_clk = s5p_mipi_dsi_change_pll(dsim,\n"
  "+\t\t\t\tdsim->dsim_config->p, dsim->dsim_config->m,\n"
  "+\t\t\t\tdsim->dsim_config->s);\n"
- "+\t\t\tif (hs_clk = 0) {\n"
+ "+\t\t\tif (hs_clk == 0) {\n"
  "+\t\t\t\tdev_err(dsim->dev,\n"
  "+\t\t\t\t\t\"failed to get hs clock.\\n\");\n"
  "+\t\t\t\treturn -EINVAL;\n"
@@ -1302,11 +1304,11 @@
  "+\t\t\ts5p_mipi_dsi_enable_pll_bypass(dsim, 0);\n"
  "+\t\t\ts5p_mipi_dsi_pll_on(dsim, 1);\n"
  "+\t\t/* DPHY : D-PHY clock out, DSIM link : external clock out */\n"
- "+\t\t} else if (byte_clk_sel = DSIM_EXT_CLK_DIV8) {\n"
+ "+\t\t} else if (byte_clk_sel == DSIM_EXT_CLK_DIV8) {\n"
  "+\t\t\tdev_warn(dsim->dev, \"this project is not support\\n\");\n"
  "+\t\t\tdev_warn(dsim->dev,\n"
  "+\t\t\t\t\"external clock source for MIPI DSIM.\\n\");\n"
- "+\t\t} else if (byte_clk_sel = DSIM_EXT_CLK_BYPASS) {\n"
+ "+\t\t} else if (byte_clk_sel == DSIM_EXT_CLK_BYPASS) {\n"
  "+\t\t\tdev_warn(dsim->dev, \"this project is not support\\n\");\n"
  "+\t\t\tdev_warn(dsim->dev,\n"
  "+\t\t\t\t\"external clock source for MIPI DSIM\\n\");\n"
@@ -1363,7 +1365,7 @@
  "+\t\t/* disable escape clock. */\n"
  "+\t\ts5p_mipi_dsi_enable_byte_clock(dsim, 0);\n"
  "+\n"
- "+\t\tif (byte_clk_sel = DSIM_PLL_OUT_DIV8)\n"
+ "+\t\tif (byte_clk_sel == DSIM_PLL_OUT_DIV8)\n"
  "+\t\t\ts5p_mipi_dsi_pll_on(dsim, 0);\n"
  "+\t}\n"
  "+\n"
@@ -1442,8 +1444,8 @@
  "+\ttiming = (struct fb_videomode *)dsim_pd->lcd_panel_info;\n"
  "+\n"
  "+\t/* in case of VIDEO MODE (RGB INTERFACE), it sets polarities. */\n"
- "+\tif (dsim_config->e_interface = (u32) DSIM_VIDEO) {\n"
- "+\t\tif (dsim_config->auto_vertical_cnt = 0) {\n"
+ "+\tif (dsim_config->e_interface == (u32) DSIM_VIDEO) {\n"
+ "+\t\tif (dsim_config->auto_vertical_cnt == 0) {\n"
  "+\t\t\ts5p_mipi_dsi_set_main_disp_vporch(dsim,\n"
  "+\t\t\t\tdsim_config->cmd_allow,\n"
  "+\t\t\t\ttiming->upper_margin,\n"
@@ -1462,7 +1464,7 @@
  "+\n"
  "+\ts5p_mipi_dsi_display_config(dsim, dsim_config);\n"
  "+\n"
- "+\tdev_info(dsim->dev, \"lcd panel => width = %d, height = %d\\n\",\n"
+ "+\tdev_info(dsim->dev, \"lcd panel ==> width = %d, height = %d\\n\",\n"
  "+\t\t\ttiming->xres, timing->yres);\n"
  "+\n"
  "+\treturn 0;\n"
@@ -1487,7 +1489,7 @@
  "+\t\t/* check clock and data lane state are stop state */\n"
  "+\t\twhile (!(s5p_mipi_dsi_is_lane_state(dsim))) {\n"
  "+\t\t\ttime_out--;\n"
- "+\t\t\tif (time_out = 0) {\n"
+ "+\t\t\tif (time_out == 0) {\n"
  "+\t\t\t\tdev_err(dsim->dev,\n"
  "+\t\t\t\t\t\"DSI Master is not stop state.\\n\");\n"
  "+\t\t\t\tdev_err(dsim->dev,\n"
@@ -1523,7 +1525,7 @@
  "+\n"
  "+int s5p_mipi_dsi_set_hs_enable(struct mipi_dsim_device *dsim)\n"
  "+{\n"
- "+\tif (dsim->state = DSIM_STATE_STOP) {\n"
+ "+\tif (dsim->state == DSIM_STATE_STOP) {\n"
  "+\t\tif (dsim->e_clk_src != DSIM_EXT_CLK_BYPASS) {\n"
  "+\t\t\tdsim->state = DSIM_STATE_HSCLKEN;\n"
  "+\n"
@@ -1554,7 +1556,7 @@
  "+\n"
  "+\t\ts5p_mipi_dsi_set_lcdc_transfer_mode(dsim, 0);\n"
  "+\t} else {\n"
- "+\t\tif (dsim->state = DSIM_STATE_INIT || dsim->state =\n"
+ "+\t\tif (dsim->state == DSIM_STATE_INIT || dsim->state ==\n"
  "+\t\t\tDSIM_STATE_ULPS) {\n"
  "+\t\t\tdev_err(dsim->dev,\n"
  "+\t\t\t\t\"DSI Master is not STOP or HSDT state.\\n\");\n"
@@ -1894,9 +1896,9 @@
  "+\t\t~((0x3 << 26) | (1 << 25) | (0x3 << 18) | (0x7 << 12) |\n"
  "+\t\t(0x3 << 16) | (0x7 << 8));\n"
  "+\n"
- "+\tif (dsim_config->e_interface = DSIM_VIDEO)\n"
+ "+\tif (dsim_config->e_interface == DSIM_VIDEO)\n"
  "+\t\treg |= (1 << 25);\n"
- "+\telse if (dsim_config->e_interface = DSIM_COMMAND)\n"
+ "+\telse if (dsim_config->e_interface == DSIM_COMMAND)\n"
  "+\t\treg &= ~(1 << 25);\n"
  "+\telse {\n"
  "+\t\tdev_err(dsim->dev, \"unknown lcd type.\\n\");\n"
@@ -2725,7 +2727,8 @@
  "+\tenum mipi_dsim_byte_clk_src\te_byte_clk;\n"
  "+\n"
  "+\t/*\n"
- "+\t * =====================+\t * |    P    |    M    |    S    |    MHz    |\n"
+ "+\t * ===========================================\n"
+ "+\t * |    P    |    M    |    S    |    MHz    |\n"
  "+\t * -------------------------------------------\n"
  "+\t * |    3    |   100   |    3    |    100    |\n"
  "+\t * |    3    |   100   |    2    |    200    |\n"
@@ -2936,4 +2939,4 @@
  "-- \n"
  1.7.4.1
 
-188a05790a4cf815858a149fd9551a480303ee97cc0825cdbf06be8b8ada4027
+665106f38d98d9fd101d1acaca9a331616defcf339b33d91abfcc299f50916d7

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