From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52468) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RdNmw-0001j6-6A for qemu-devel@nongnu.org; Wed, 21 Dec 2011 10:09:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RdNmq-0006iD-5D for qemu-devel@nongnu.org; Wed, 21 Dec 2011 10:09:02 -0500 Received: from mailout4.w1.samsung.com ([210.118.77.14]:34735) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RdNmp-0006aJ-VY for qemu-devel@nongnu.org; Wed, 21 Dec 2011 10:08:56 -0500 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; charset=UTF-8; format=flowed Received: from euspt2 ([210.118.77.14]) by mailout4.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWK003PB7ERGU60@mailout4.w1.samsung.com> for qemu-devel@nongnu.org; Wed, 21 Dec 2011 15:08:51 +0000 (GMT) Received: from [106.109.8.48] by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWK0030A7EQ12@spt2.w1.samsung.com> for qemu-devel@nongnu.org; Wed, 21 Dec 2011 15:08:50 +0000 (GMT) Date: Wed, 21 Dec 2011 19:08:49 +0400 From: Evgeny Voevodin In-reply-to: Message-id: <4EF1F681.7090805@samsung.com> References: <1324295617-5798-1-git-send-email-e.voevodin@samsung.com> <1324295617-5798-5-git-send-email-e.voevodin@samsung.com> Subject: Re: [Qemu-devel] [PATCH v4 04/11] ARM: exynos4210: IRQ subsystem support. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: m.kozlov@samsung.com, qemu-devel@nongnu.org, d.solodkiy@samsung.com On 12/21/2011 05:50 PM, Peter Maydell wrote: > On 19 December 2011 11:53, Evgeny Voevodin wrote: > >> +static uint64_t exynos4210_gic_cpu_read(void *opaque, target_phys_addr_t offset, >> + unsigned size) >> +{ >> + Exynos4210GicState *s = (Exynos4210GicState *) opaque; >> + DPRINTF_EXYNOS4210_GIC("CPU%d: read offset 0x%x\n", >> + gic_get_current_cpu(), offset); >> + return gic_cpu_read(&s->gic, gic_get_current_cpu(), offset& ~0x8000); >> +} > arm_gic.c exposes the CPU and distributor interfaces as their own > memory regions now -- you shouldn't need any of this intermediate > layer of functions. > > (Reviewing the rest of this series is on my todo list but I can't > guarantee I'll get to it until after Christmas now.) > > -- PMM > These functions are not actually for splitting CPU and Distributer interfaces. In our board we have two GICs - internal and external. Internal GIC is completely matching arm_gic.c. Internal GIC CPU[n] and Distributer[n] interfaces are at 0x100 and 0x1000 offsets from 0x10500000 base. But external GIC is different. It's CPU[0] interface is at 0x0 offset from 0x10480000 base and CPU[1] interface is at 0x8000 offset from 0x10480000 base It's Distributer[0] interface is at 0x0 offset from 0x10490000 base and Distributer[1] interface is at 0x8000 offset from 0x10490000 base [n] - is corresponding to SMP CPU Core. So, we need these wrapper functions for External GIC. In public accessed documentation internal GIC is not covered for some reason. -- Kind regards, Evgeny Voevodin, Leading Software Engineer, ASWG, Moscow R&D center, Samsung Electronics e-mail: e.voevodin@samsung.com