From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kenneth Graunke Subject: Re: [PATCH] drm/i915: Add support for resetting the SO write pointers on gen7. Date: Mon, 02 Jan 2012 11:51:11 -0800 Message-ID: <4F020AAF.5020104@whitecape.org> References: <1325209977-27562-1-git-send-email-eric@anholt.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from homiemail-a62.g.dreamhost.com (caiajhbdccah.dreamhost.com [208.97.132.207]) by gabe.freedesktop.org (Postfix) with ESMTP id C66C29EBA2 for ; Mon, 2 Jan 2012 11:49:22 -0800 (PST) In-Reply-To: <1325209977-27562-1-git-send-email-eric@anholt.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eric Anholt Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 12/29/2011 05:52 PM, Eric Anholt wrote: > These registers are automatically incremented by the hardware during > transform feedback to track where the next streamed vertex output > should go. Unlike the previous generation, which had a packet for > setting the corresponding registers to a defined value, gen7 only has > MI_LOAD_REGISTER_IMM to do so. That's a secure packet (since it loads > an arbitrary register), so we need to do it from the kernel, and it > needs to be settable atomically with the batchbuffer execution so that > two clients doing transform feedback don't stomp on each others' > state. > > Instead of building a more complicated interface involcing setting the > registers to a specific value, just set them to 0 when asked and > userland can tweak its pointers accordingly. > > Signed-off-by: Eric Anholt Looks great! Reviewed-by: Kenneth Graunke