From mboxrd@z Thu Jan 1 00:00:00 1970 From: Aneesh V Date: Wed, 04 Jan 2012 12:33:36 +0100 Subject: [U-Boot] [PATCH V12 08/14] Add cache functions to SPL for armv7 In-Reply-To: <1325665518-9410-9-git-send-email-sbabic@denx.de> References: <1324049833-18143-1-git-send-email-sbabic@denx.de> <1325665518-9410-1-git-send-email-sbabic@denx.de> <1325665518-9410-9-git-send-email-sbabic@denx.de> Message-ID: <4F043910.3070704@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stefano, On Wednesday 04 January 2012 09:25 AM, Stefano Babic wrote: > Signed-off-by: Stefano Babic > CC: Tom Rini > CC: Wolfgang Denk > CC: Simon Schwarz > --- > > Changes since V11: > > - enable cache files in Makefile after checking build for OMAP4/5 How are you allocating memory for the page-tables(gd->tlb_addr)? Also we need to take care of the complexities when u-boot runs after SPL. Please have a look at this. http://article.gmane.org/gmane.comp.boot-loaders.u-boot/100012/match=spl+cache > > arch/arm/cpu/armv7/Makefile | 2 -- > arch/arm/cpu/armv7/cpu.c | 2 ++ > arch/arm/lib/Makefile | 5 +++-- > 3 files changed, 5 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile > index f97fa3d..6b2addc 100644 > --- a/arch/arm/cpu/armv7/Makefile > +++ b/arch/arm/cpu/armv7/Makefile > @@ -27,9 +27,7 @@ LIB = $(obj)lib$(CPU).o > > START := start.o > > -ifndef CONFIG_SPL_BUILD > COBJS += cache_v7.o > -endif > > COBJS += cpu.o > COBJS += syslib.o > diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c > index 662c496..c6fa8ef 100644 > --- a/arch/arm/cpu/armv7/cpu.c > +++ b/arch/arm/cpu/armv7/cpu.c > @@ -52,7 +52,9 @@ int cleanup_before_linux(void) > * > * we turn off caches etc ... > */ > +#ifndef CONFIG_SPL_BUILD > disable_interrupts(); > +#endif > > /* > * Turn off I-cache and invalidate it > diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile > index 300c8fa..39a9550 100644 > --- a/arch/arm/lib/Makefile > +++ b/arch/arm/lib/Makefile > @@ -39,8 +39,6 @@ GLCOBJS += div0.o > > COBJS-y += board.o > COBJS-y += bootm.o > -COBJS-y += cache.o > -COBJS-y += cache-cp15.o > COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o > COBJS-y += interrupts.o > COBJS-y += reset.o > @@ -48,6 +46,9 @@ SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o > SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o > endif > > +COBJS-y += cache.o > +COBJS-y += cache-cp15.o > + > SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \ > $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) > OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))