From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Mon, 09 Jan 2012 19:14:59 +0000 Subject: Re: [RFC PATCH 01/16] powerpc/booke: Set CPU_FTR_DEBUG_LVL_EXC on Message-Id: <4F0B3CB3.6040909@freescale.com> List-Id: References: <20111221013412.GA8378@schlenkerla.am.freescale.net> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Alexander Graf Cc: kvm-ppc@vger.kernel.org, kvm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org On 01/09/2012 09:21 AM, Alexander Graf wrote: > > On 21.12.2011, at 02:34, Scott Wood wrote: > >> Currently 32-bit only cares about this for choice of exception >> vector, which is done in core-specific code. However, KVM will >> want to distinguish as well. >> >> Signed-off-by: Scott Wood >> --- >> arch/powerpc/include/asm/cputable.h | 5 +++-- >> 1 files changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h >> index e30442c..033ad30 100644 >> --- a/arch/powerpc/include/asm/cputable.h >> +++ b/arch/powerpc/include/asm/cputable.h >> @@ -375,7 +375,8 @@ extern const char *powerpc_base_platform; >> #define CPU_FTRS_47X (CPU_FTRS_440x6) >> #define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ >> CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \ >> - CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE) >> + CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE | \ >> + CPU_FTR_DEBUG_LVL_EXC) > > KVM on E200? This isn't a KVM patch, it's a patch to make CPU_FTR_DEBUG_LVL_EXC be set properly on 32-bit chips. e200 has this CPU feature. -Scott From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from DB3EHSOBE006.bigfish.com (db3ehsobe006.messaging.microsoft.com [213.199.154.144]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id EB520B6FA7 for ; Tue, 10 Jan 2012 06:15:09 +1100 (EST) Message-ID: <4F0B3CB3.6040909@freescale.com> Date: Mon, 9 Jan 2012 13:14:59 -0600 From: Scott Wood MIME-Version: 1.0 To: Alexander Graf Subject: Re: [RFC PATCH 01/16] powerpc/booke: Set CPU_FTR_DEBUG_LVL_EXC on 32-bit References: <20111221013412.GA8378@schlenkerla.am.freescale.net> In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Cc: linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 01/09/2012 09:21 AM, Alexander Graf wrote: > > On 21.12.2011, at 02:34, Scott Wood wrote: > >> Currently 32-bit only cares about this for choice of exception >> vector, which is done in core-specific code. However, KVM will >> want to distinguish as well. >> >> Signed-off-by: Scott Wood >> --- >> arch/powerpc/include/asm/cputable.h | 5 +++-- >> 1 files changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h >> index e30442c..033ad30 100644 >> --- a/arch/powerpc/include/asm/cputable.h >> +++ b/arch/powerpc/include/asm/cputable.h >> @@ -375,7 +375,8 @@ extern const char *powerpc_base_platform; >> #define CPU_FTRS_47X (CPU_FTRS_440x6) >> #define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ >> CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \ >> - CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE) >> + CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE | \ >> + CPU_FTR_DEBUG_LVL_EXC) > > KVM on E200? This isn't a KVM patch, it's a patch to make CPU_FTR_DEBUG_LVL_EXC be set properly on 32-bit chips. e200 has this CPU feature. -Scott From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Subject: Re: [RFC PATCH 01/16] powerpc/booke: Set CPU_FTR_DEBUG_LVL_EXC on 32-bit Date: Mon, 9 Jan 2012 13:14:59 -0600 Message-ID: <4F0B3CB3.6040909@freescale.com> References: <20111221013412.GA8378@schlenkerla.am.freescale.net> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Cc: , , To: Alexander Graf Return-path: In-Reply-To: Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 01/09/2012 09:21 AM, Alexander Graf wrote: > > On 21.12.2011, at 02:34, Scott Wood wrote: > >> Currently 32-bit only cares about this for choice of exception >> vector, which is done in core-specific code. However, KVM will >> want to distinguish as well. >> >> Signed-off-by: Scott Wood >> --- >> arch/powerpc/include/asm/cputable.h | 5 +++-- >> 1 files changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h >> index e30442c..033ad30 100644 >> --- a/arch/powerpc/include/asm/cputable.h >> +++ b/arch/powerpc/include/asm/cputable.h >> @@ -375,7 +375,8 @@ extern const char *powerpc_base_platform; >> #define CPU_FTRS_47X (CPU_FTRS_440x6) >> #define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ >> CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \ >> - CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE) >> + CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE | \ >> + CPU_FTR_DEBUG_LVL_EXC) > > KVM on E200? This isn't a KVM patch, it's a patch to make CPU_FTR_DEBUG_LVL_EXC be set properly on 32-bit chips. e200 has this CPU feature. -Scott