From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:47589) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RmUXZ-0008Hu-6Z for qemu-devel@nongnu.org; Sun, 15 Jan 2012 13:10:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RmUXY-0002m1-4E for qemu-devel@nongnu.org; Sun, 15 Jan 2012 13:10:49 -0500 Received: from cantor2.suse.de ([195.135.220.15]:43223 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RmUXX-0002lw-Vm for qemu-devel@nongnu.org; Sun, 15 Jan 2012 13:10:48 -0500 Message-ID: <4F131633.5020604@suse.de> Date: Sun, 15 Jan 2012 19:08:51 +0100 From: =?ISO-8859-1?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 0/3] Support configurable CPU Model-Specific Registers (MSRs) in cpudefs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Josh Triplett Cc: Anthony Liguori , qemu-devel@nongnu.org, Paul Brook Am 15.01.2012 16:39, schrieb Josh Triplett: > Josh Triplett (3): > Add cpudef option to GPF on unknown MSRs > Support arbitrary additional MSRs in cpu definitions > Handle parse failures in CPU definitions, and avoid adding a partial > cpudef Please prefix the subjects with "target-i386: ". PowerPC has MSRs, too. Thanks, Andreas > qemu-config.c | 6 ++++ > target-i386/cpu.h | 6 ++++ > target-i386/cpuid.c | 59 +++++++++++++++++++++++++++++++++++++++= +++++++- > target-i386/op_helper.c | 36 +++++++++++++++++++++++++--- > 4 files changed, 102 insertions(+), 5 deletions(-) --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg