diff for duplicates of <4F17AA10.7080604@samsung.com> diff --git a/a/1.txt b/N1/1.txt index 7c49da1..099e456 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -290,7 +290,7 @@ index 0000000..5ca6618 + if (!lcd_dev) + continue; + -+ if ((strcmp(lcd_drv->name, lcd_dev->name)) = 0) { ++ if ((strcmp(lcd_drv->name, lcd_dev->name)) == 0) { + /** + * bus_id would be used to identify + * connected bus. @@ -357,7 +357,7 @@ index 0000000..5ca6618 + dev_dbg(dsim->dev, "lcd_dev->bus_id = %d, dsim->id = %d\n", + lcd_dev->bus_id, dsim->id); + -+ if ((strcmp(lcd_drv->name, name) = 0)) { ++ if ((strcmp(lcd_drv->name, name) == 0)) { + lcd_dev->master = dsim; + + lcd_dev->dev.parent = dsim->dev; @@ -418,13 +418,13 @@ index 0000000..5ca6618 + + /* get mipi_dsim_platform_data. */ + dsim_pd = (struct mipi_dsim_platform_data *)dsim->pd; -+ if (dsim_pd = NULL) { ++ if (dsim_pd == NULL) { + dev_err(&pdev->dev, "failed to get platform data for dsim.\n"); + goto err_clock_get; + } + /* get mipi_dsim_config. */ + dsim_config = dsim_pd->dsim_config; -+ if (dsim_config = NULL) { ++ if (dsim_config == NULL) { + dev_err(&pdev->dev, "failed to get dsim config data.\n"); + goto err_clock_get; + } @@ -529,7 +529,7 @@ index 0000000..5ca6618 + platform_set_drvdata(pdev, dsim); + + dev_dbg(&pdev->dev, "mipi-dsi driver(%s mode) has been probed.\n", -+ (dsim_config->e_interface = DSIM_COMMAND) ? ++ (dsim_config->e_interface == DSIM_COMMAND) ? + "CPU" : "RGB"); + + return 0; @@ -806,7 +806,7 @@ index 0000000..3e9537f + * send remainder data less then 4. + */ + if ((data_size - data_cnt) < 4) { -+ if ((data_size - data_cnt) = 3) { ++ if ((data_size - data_cnt) == 3) { + payload = data0[data_cnt] | + data0[data_cnt + 1] << 8 | + data0[data_cnt + 2] << 16; @@ -814,14 +814,14 @@ index 0000000..3e9537f + payload, data0[data_cnt], + data0[data_cnt + 1], + data0[data_cnt + 2]); -+ } else if ((data_size - data_cnt) = 2) { ++ } else if ((data_size - data_cnt) == 2) { + payload = data0[data_cnt] | + data0[data_cnt + 1] << 8; + dev_dbg(dsim->dev, + "count = 2 payload = %x, %x %x\n", payload, + data0[data_cnt], + data0[data_cnt + 1]); -+ } else if ((data_size - data_cnt) = 1) { ++ } else if ((data_size - data_cnt) == 1) { + payload = data0[data_cnt]; + } + @@ -850,7 +850,7 @@ index 0000000..3e9537f +{ + unsigned int check_rx_ack = 0; + -+ if (dsim->state = DSIM_STATE_ULPS) { ++ if (dsim->state == DSIM_STATE_ULPS) { + dev_err(dsim->dev, "state is ULPS.\n"); + + return -EINVAL; @@ -999,7 +999,8 @@ index 0000000..3e9537f + rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim); + dev_dbg(dsim->dev, "received pkt : %08x\n", rcv_pkt); + for (j = 0; j < 4; j++) { -+ rx_buf[(i * 4) + j] + (u8)(rcv_pkt >> (j * 8)) & 0xff; ++ rx_buf[(i * 4) + j] = ++ (u8)(rcv_pkt >> (j * 8)) & 0xff; + dev_dbg(dsim->dev, "received value : %02x\n", + (rcv_pkt >> (j * 8)) & 0xff); + } @@ -1008,7 +1009,8 @@ index 0000000..3e9537f + rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim); + dev_dbg(dsim->dev, "received pkt : %08x\n", rcv_pkt); + for (j = 0; j < (rxsize % 4); j++) { -+ rx_buf[(i * 4) + j] + (u8)(rcv_pkt >> (j * 8)) & 0xff; ++ rx_buf[(i * 4) + j] = ++ (u8)(rcv_pkt >> (j * 8)) & 0xff; + dev_dbg(dsim->dev, "received value : %02x\n", + (rcv_pkt >> (j * 8)) & 0xff); + } @@ -1039,7 +1041,7 @@ index 0000000..3e9537f + u8 response = 0; + u16 rxsize; + -+ if (dsim->state = DSIM_STATE_ULPS) { ++ if (dsim->state == DSIM_STATE_ULPS) { + dev_err(dsim->dev, "state is ULPS.\n"); + + return -EINVAL; @@ -1121,7 +1123,7 @@ index 0000000..3e9537f + i = 0; + while (1) { + rcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim); -+ if ((rcv_pkt = MIPI_RX_FIFO_READ_DONE) ++ if ((rcv_pkt == MIPI_RX_FIFO_READ_DONE) + || (i > MIPI_MAX_RX_FIFO)) + break; + dev_dbg(dsim->dev, @@ -1149,7 +1151,7 @@ index 0000000..3e9537f + sw_timeout--; + if (s5p_mipi_dsi_is_pll_stable(dsim)) + return 0; -+ if (sw_timeout = 0) ++ if (sw_timeout == 0) + return -EINVAL; + } + } else @@ -1256,11 +1258,11 @@ index 0000000..3e9537f + s5p_mipi_dsi_set_byte_clock_src(dsim, byte_clk_sel); + + /* DPHY, DSIM Link : D-PHY clock out */ -+ if (byte_clk_sel = DSIM_PLL_OUT_DIV8) { ++ if (byte_clk_sel == DSIM_PLL_OUT_DIV8) { + hs_clk = s5p_mipi_dsi_change_pll(dsim, + dsim->dsim_config->p, dsim->dsim_config->m, + dsim->dsim_config->s); -+ if (hs_clk = 0) { ++ if (hs_clk == 0) { + dev_err(dsim->dev, + "failed to get hs clock.\n"); + return -EINVAL; @@ -1270,11 +1272,11 @@ index 0000000..3e9537f + s5p_mipi_dsi_enable_pll_bypass(dsim, 0); + s5p_mipi_dsi_pll_on(dsim, 1); + /* DPHY : D-PHY clock out, DSIM link : external clock out */ -+ } else if (byte_clk_sel = DSIM_EXT_CLK_DIV8) { ++ } else if (byte_clk_sel == DSIM_EXT_CLK_DIV8) { + dev_warn(dsim->dev, "this project is not support\n"); + dev_warn(dsim->dev, + "external clock source for MIPI DSIM.\n"); -+ } else if (byte_clk_sel = DSIM_EXT_CLK_BYPASS) { ++ } else if (byte_clk_sel == DSIM_EXT_CLK_BYPASS) { + dev_warn(dsim->dev, "this project is not support\n"); + dev_warn(dsim->dev, + "external clock source for MIPI DSIM\n"); @@ -1331,7 +1333,7 @@ index 0000000..3e9537f + /* disable escape clock. */ + s5p_mipi_dsi_enable_byte_clock(dsim, 0); + -+ if (byte_clk_sel = DSIM_PLL_OUT_DIV8) ++ if (byte_clk_sel == DSIM_PLL_OUT_DIV8) + s5p_mipi_dsi_pll_on(dsim, 0); + } + @@ -1410,8 +1412,8 @@ index 0000000..3e9537f + timing = (struct fb_videomode *)dsim_pd->lcd_panel_info; + + /* in case of VIDEO MODE (RGB INTERFACE), it sets polarities. */ -+ if (dsim_config->e_interface = (u32) DSIM_VIDEO) { -+ if (dsim_config->auto_vertical_cnt = 0) { ++ if (dsim_config->e_interface == (u32) DSIM_VIDEO) { ++ if (dsim_config->auto_vertical_cnt == 0) { + s5p_mipi_dsi_set_main_disp_vporch(dsim, + dsim_config->cmd_allow, + timing->upper_margin, @@ -1430,7 +1432,7 @@ index 0000000..3e9537f + + s5p_mipi_dsi_display_config(dsim, dsim_config); + -+ dev_info(dsim->dev, "lcd panel => width = %d, height = %d\n", ++ dev_info(dsim->dev, "lcd panel ==> width = %d, height = %d\n", + timing->xres, timing->yres); + + return 0; @@ -1455,7 +1457,7 @@ index 0000000..3e9537f + /* check clock and data lane state are stop state */ + while (!(s5p_mipi_dsi_is_lane_state(dsim))) { + time_out--; -+ if (time_out = 0) { ++ if (time_out == 0) { + dev_err(dsim->dev, + "DSI Master is not stop state.\n"); + dev_err(dsim->dev, @@ -1496,7 +1498,7 @@ index 0000000..3e9537f + return 0; + } + -+ if (dsim->e_clk_src = DSIM_EXT_CLK_BYPASS) { ++ if (dsim->e_clk_src == DSIM_EXT_CLK_BYPASS) { + dev_warn(dsim->dev, "clock source is external bypass.\n"); + return 0; + } @@ -1522,7 +1524,7 @@ index 0000000..3e9537f + + s5p_mipi_dsi_set_lcdc_transfer_mode(dsim, 0); + } else { -+ if (dsim->state = DSIM_STATE_INIT || dsim->state = ++ if (dsim->state == DSIM_STATE_INIT || dsim->state == + DSIM_STATE_ULPS) { + dev_err(dsim->dev, + "DSI Master is not STOP or HSDT state.\n"); @@ -1862,9 +1864,9 @@ index 0000000..a4a21d0 + ~((0x3 << 26) | (1 << 25) | (0x3 << 18) | (0x7 << 12) | + (0x3 << 16) | (0x7 << 8)); + -+ if (dsim_config->e_interface = DSIM_VIDEO) ++ if (dsim_config->e_interface == DSIM_VIDEO) + reg |= (1 << 25); -+ else if (dsim_config->e_interface = DSIM_COMMAND) ++ else if (dsim_config->e_interface == DSIM_COMMAND) + reg &= ~(1 << 25); + else { + dev_err(dsim->dev, "unknown lcd type.\n"); @@ -2676,7 +2678,8 @@ index 0000000..f54da24 + enum mipi_dsim_byte_clk_src e_byte_clk; + + /* -+ * =====================+ * | P | M | S | MHz | ++ * =========================================== ++ * | P | M | S | MHz | + * ------------------------------------------- + * | 3 | 100 | 3 | 100 | + * | 3 | 100 | 2 | 200 | diff --git a/a/content_digest b/N1/content_digest index 4ff2c07..19d7b8b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,6 +1,6 @@ - "From\0Donghwa Lee <dh09.lee@samsung.com>\0" + "From\0dh09.lee@samsung.com (Donghwa Lee)\0" "Subject\0[PATCH v7 1/2] video: support MIPI-DSI controller driver\0" - "Date\0Thu, 19 Jan 2012 05:28:48 +0000\0" + "Date\0Thu, 19 Jan 2012 14:28:48 +0900\0" "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" @@ -296,7 +296,7 @@ "+\t\tif (!lcd_dev)\n" "+\t\t\tcontinue;\n" "+\n" - "+\t\tif ((strcmp(lcd_drv->name, lcd_dev->name)) = 0) {\n" + "+\t\tif ((strcmp(lcd_drv->name, lcd_dev->name)) == 0) {\n" "+\t\t\t/**\n" "+\t\t\t * bus_id would be used to identify\n" "+\t\t\t * connected bus.\n" @@ -363,7 +363,7 @@ "+\t\tdev_dbg(dsim->dev, \"lcd_dev->bus_id = %d, dsim->id = %d\\n\",\n" "+\t\t\t\tlcd_dev->bus_id, dsim->id);\n" "+\n" - "+\t\tif ((strcmp(lcd_drv->name, name) = 0)) {\n" + "+\t\tif ((strcmp(lcd_drv->name, name) == 0)) {\n" "+\t\t\tlcd_dev->master = dsim;\n" "+\n" "+\t\t\tlcd_dev->dev.parent = dsim->dev;\n" @@ -424,13 +424,13 @@ "+\n" "+\t/* get mipi_dsim_platform_data. */\n" "+\tdsim_pd = (struct mipi_dsim_platform_data *)dsim->pd;\n" - "+\tif (dsim_pd = NULL) {\n" + "+\tif (dsim_pd == NULL) {\n" "+\t\tdev_err(&pdev->dev, \"failed to get platform data for dsim.\\n\");\n" "+\t\tgoto err_clock_get;\n" "+\t}\n" "+\t/* get mipi_dsim_config. */\n" "+\tdsim_config = dsim_pd->dsim_config;\n" - "+\tif (dsim_config = NULL) {\n" + "+\tif (dsim_config == NULL) {\n" "+\t\tdev_err(&pdev->dev, \"failed to get dsim config data.\\n\");\n" "+\t\tgoto err_clock_get;\n" "+\t}\n" @@ -535,7 +535,7 @@ "+\tplatform_set_drvdata(pdev, dsim);\n" "+\n" "+\tdev_dbg(&pdev->dev, \"mipi-dsi driver(%s mode) has been probed.\\n\",\n" - "+\t\t(dsim_config->e_interface = DSIM_COMMAND) ?\n" + "+\t\t(dsim_config->e_interface == DSIM_COMMAND) ?\n" "+\t\t\t\"CPU\" : \"RGB\");\n" "+\n" "+\treturn 0;\n" @@ -812,7 +812,7 @@ "+\t\t * send remainder data less then 4.\n" "+\t\t */\n" "+\t\tif ((data_size - data_cnt) < 4) {\n" - "+\t\t\tif ((data_size - data_cnt) = 3) {\n" + "+\t\t\tif ((data_size - data_cnt) == 3) {\n" "+\t\t\t\tpayload = data0[data_cnt] |\n" "+\t\t\t\t data0[data_cnt + 1] << 8 |\n" "+\t\t\t\t\tdata0[data_cnt + 2] << 16;\n" @@ -820,14 +820,14 @@ "+\t\t\t\tpayload, data0[data_cnt],\n" "+\t\t\t\tdata0[data_cnt + 1],\n" "+\t\t\t\tdata0[data_cnt + 2]);\n" - "+\t\t\t} else if ((data_size - data_cnt) = 2) {\n" + "+\t\t\t} else if ((data_size - data_cnt) == 2) {\n" "+\t\t\t\tpayload = data0[data_cnt] |\n" "+\t\t\t\t\tdata0[data_cnt + 1] << 8;\n" "+\t\t\tdev_dbg(dsim->dev,\n" "+\t\t\t\t\"count = 2 payload = %x, %x %x\\n\", payload,\n" "+\t\t\t\tdata0[data_cnt],\n" "+\t\t\t\tdata0[data_cnt + 1]);\n" - "+\t\t\t} else if ((data_size - data_cnt) = 1) {\n" + "+\t\t\t} else if ((data_size - data_cnt) == 1) {\n" "+\t\t\t\tpayload = data0[data_cnt];\n" "+\t\t\t}\n" "+\n" @@ -856,7 +856,7 @@ "+{\n" "+\tunsigned int check_rx_ack = 0;\n" "+\n" - "+\tif (dsim->state = DSIM_STATE_ULPS) {\n" + "+\tif (dsim->state == DSIM_STATE_ULPS) {\n" "+\t\tdev_err(dsim->dev, \"state is ULPS.\\n\");\n" "+\n" "+\t\treturn -EINVAL;\n" @@ -1005,7 +1005,8 @@ "+\t\trcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);\n" "+\t\tdev_dbg(dsim->dev, \"received pkt : %08x\\n\", rcv_pkt);\n" "+\t\tfor (j = 0; j < 4; j++) {\n" - "+\t\t\trx_buf[(i * 4) + j] +\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n" + "+\t\t\trx_buf[(i * 4) + j] =\n" + "+\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n" "+\t\t\tdev_dbg(dsim->dev, \"received value : %02x\\n\",\n" "+\t\t\t\t\t(rcv_pkt >> (j * 8)) & 0xff);\n" "+\t\t}\n" @@ -1014,7 +1015,8 @@ "+\t\trcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);\n" "+\t\tdev_dbg(dsim->dev, \"received pkt : %08x\\n\", rcv_pkt);\n" "+\t\tfor (j = 0; j < (rxsize % 4); j++) {\n" - "+\t\t\trx_buf[(i * 4) + j] +\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n" + "+\t\t\trx_buf[(i * 4) + j] =\n" + "+\t\t\t\t\t(u8)(rcv_pkt >> (j * 8)) & 0xff;\n" "+\t\t\tdev_dbg(dsim->dev, \"received value : %02x\\n\",\n" "+\t\t\t\t\t(rcv_pkt >> (j * 8)) & 0xff);\n" "+\t\t}\n" @@ -1045,7 +1047,7 @@ "+\tu8 response = 0;\n" "+\tu16 rxsize;\n" "+\n" - "+\tif (dsim->state = DSIM_STATE_ULPS) {\n" + "+\tif (dsim->state == DSIM_STATE_ULPS) {\n" "+\t\tdev_err(dsim->dev, \"state is ULPS.\\n\");\n" "+\n" "+\t\treturn -EINVAL;\n" @@ -1127,7 +1129,7 @@ "+\ti = 0;\n" "+\twhile (1) {\n" "+\t\trcv_pkt = s5p_mipi_dsi_rd_rx_fifo(dsim);\n" - "+\t\tif ((rcv_pkt = MIPI_RX_FIFO_READ_DONE)\n" + "+\t\tif ((rcv_pkt == MIPI_RX_FIFO_READ_DONE)\n" "+\t\t\t\t|| (i > MIPI_MAX_RX_FIFO))\n" "+\t\t\tbreak;\n" "+\t\tdev_dbg(dsim->dev,\n" @@ -1155,7 +1157,7 @@ "+\t\t\tsw_timeout--;\n" "+\t\t\tif (s5p_mipi_dsi_is_pll_stable(dsim))\n" "+\t\t\t\treturn 0;\n" - "+\t\t\tif (sw_timeout = 0)\n" + "+\t\t\tif (sw_timeout == 0)\n" "+\t\t\t\treturn -EINVAL;\n" "+\t\t}\n" "+\t} else\n" @@ -1262,11 +1264,11 @@ "+\t\ts5p_mipi_dsi_set_byte_clock_src(dsim, byte_clk_sel);\n" "+\n" "+\t\t/* DPHY, DSIM Link : D-PHY clock out */\n" - "+\t\tif (byte_clk_sel = DSIM_PLL_OUT_DIV8) {\n" + "+\t\tif (byte_clk_sel == DSIM_PLL_OUT_DIV8) {\n" "+\t\t\ths_clk = s5p_mipi_dsi_change_pll(dsim,\n" "+\t\t\t\tdsim->dsim_config->p, dsim->dsim_config->m,\n" "+\t\t\t\tdsim->dsim_config->s);\n" - "+\t\t\tif (hs_clk = 0) {\n" + "+\t\t\tif (hs_clk == 0) {\n" "+\t\t\t\tdev_err(dsim->dev,\n" "+\t\t\t\t\t\"failed to get hs clock.\\n\");\n" "+\t\t\t\treturn -EINVAL;\n" @@ -1276,11 +1278,11 @@ "+\t\t\ts5p_mipi_dsi_enable_pll_bypass(dsim, 0);\n" "+\t\t\ts5p_mipi_dsi_pll_on(dsim, 1);\n" "+\t\t/* DPHY : D-PHY clock out, DSIM link : external clock out */\n" - "+\t\t} else if (byte_clk_sel = DSIM_EXT_CLK_DIV8) {\n" + "+\t\t} else if (byte_clk_sel == DSIM_EXT_CLK_DIV8) {\n" "+\t\t\tdev_warn(dsim->dev, \"this project is not support\\n\");\n" "+\t\t\tdev_warn(dsim->dev,\n" "+\t\t\t\t\"external clock source for MIPI DSIM.\\n\");\n" - "+\t\t} else if (byte_clk_sel = DSIM_EXT_CLK_BYPASS) {\n" + "+\t\t} else if (byte_clk_sel == DSIM_EXT_CLK_BYPASS) {\n" "+\t\t\tdev_warn(dsim->dev, \"this project is not support\\n\");\n" "+\t\t\tdev_warn(dsim->dev,\n" "+\t\t\t\t\"external clock source for MIPI DSIM\\n\");\n" @@ -1337,7 +1339,7 @@ "+\t\t/* disable escape clock. */\n" "+\t\ts5p_mipi_dsi_enable_byte_clock(dsim, 0);\n" "+\n" - "+\t\tif (byte_clk_sel = DSIM_PLL_OUT_DIV8)\n" + "+\t\tif (byte_clk_sel == DSIM_PLL_OUT_DIV8)\n" "+\t\t\ts5p_mipi_dsi_pll_on(dsim, 0);\n" "+\t}\n" "+\n" @@ -1416,8 +1418,8 @@ "+\ttiming = (struct fb_videomode *)dsim_pd->lcd_panel_info;\n" "+\n" "+\t/* in case of VIDEO MODE (RGB INTERFACE), it sets polarities. */\n" - "+\tif (dsim_config->e_interface = (u32) DSIM_VIDEO) {\n" - "+\t\tif (dsim_config->auto_vertical_cnt = 0) {\n" + "+\tif (dsim_config->e_interface == (u32) DSIM_VIDEO) {\n" + "+\t\tif (dsim_config->auto_vertical_cnt == 0) {\n" "+\t\t\ts5p_mipi_dsi_set_main_disp_vporch(dsim,\n" "+\t\t\t\tdsim_config->cmd_allow,\n" "+\t\t\t\ttiming->upper_margin,\n" @@ -1436,7 +1438,7 @@ "+\n" "+\ts5p_mipi_dsi_display_config(dsim, dsim_config);\n" "+\n" - "+\tdev_info(dsim->dev, \"lcd panel => width = %d, height = %d\\n\",\n" + "+\tdev_info(dsim->dev, \"lcd panel ==> width = %d, height = %d\\n\",\n" "+\t\t\ttiming->xres, timing->yres);\n" "+\n" "+\treturn 0;\n" @@ -1461,7 +1463,7 @@ "+\t\t/* check clock and data lane state are stop state */\n" "+\t\twhile (!(s5p_mipi_dsi_is_lane_state(dsim))) {\n" "+\t\t\ttime_out--;\n" - "+\t\t\tif (time_out = 0) {\n" + "+\t\t\tif (time_out == 0) {\n" "+\t\t\t\tdev_err(dsim->dev,\n" "+\t\t\t\t\t\"DSI Master is not stop state.\\n\");\n" "+\t\t\t\tdev_err(dsim->dev,\n" @@ -1502,7 +1504,7 @@ "+\t\treturn 0;\n" "+\t}\n" "+\n" - "+\tif (dsim->e_clk_src = DSIM_EXT_CLK_BYPASS) {\n" + "+\tif (dsim->e_clk_src == DSIM_EXT_CLK_BYPASS) {\n" "+\t\tdev_warn(dsim->dev, \"clock source is external bypass.\\n\");\n" "+\t\treturn 0;\n" "+\t}\n" @@ -1528,7 +1530,7 @@ "+\n" "+\t\ts5p_mipi_dsi_set_lcdc_transfer_mode(dsim, 0);\n" "+\t} else {\n" - "+\t\tif (dsim->state = DSIM_STATE_INIT || dsim->state =\n" + "+\t\tif (dsim->state == DSIM_STATE_INIT || dsim->state ==\n" "+\t\t\tDSIM_STATE_ULPS) {\n" "+\t\t\tdev_err(dsim->dev,\n" "+\t\t\t\t\"DSI Master is not STOP or HSDT state.\\n\");\n" @@ -1868,9 +1870,9 @@ "+\t\t~((0x3 << 26) | (1 << 25) | (0x3 << 18) | (0x7 << 12) |\n" "+\t\t(0x3 << 16) | (0x7 << 8));\n" "+\n" - "+\tif (dsim_config->e_interface = DSIM_VIDEO)\n" + "+\tif (dsim_config->e_interface == DSIM_VIDEO)\n" "+\t\treg |= (1 << 25);\n" - "+\telse if (dsim_config->e_interface = DSIM_COMMAND)\n" + "+\telse if (dsim_config->e_interface == DSIM_COMMAND)\n" "+\t\treg &= ~(1 << 25);\n" "+\telse {\n" "+\t\tdev_err(dsim->dev, \"unknown lcd type.\\n\");\n" @@ -2682,7 +2684,8 @@ "+\tenum mipi_dsim_byte_clk_src\te_byte_clk;\n" "+\n" "+\t/*\n" - "+\t * =====================+\t * | P | M | S | MHz |\n" + "+\t * ===========================================\n" + "+\t * | P | M | S | MHz |\n" "+\t * -------------------------------------------\n" "+\t * | 3 | 100 | 3 | 100 |\n" "+\t * | 3 | 100 | 2 | 200 |\n" @@ -2891,4 +2894,4 @@ "-- \n" 1.7.4.1 -68fe94faed5c4981a8710d405a5e96e324b440068903c22f9db436c457767e26 +94ee87c857bf6ea03e5d58849f23bb016a72c5e90aa931b614e1001bcc8560d8
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