From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH] x86/vMSI: miscellaneous fixes Date: Fri, 20 Jan 2012 16:50:58 +0000 Message-ID: <4F199B72.6030100@citrix.com> References: <4F19A577020000780006E115@nat28.tlf.novell.com> <4F1998B2.1070501@citrix.com> <4F19A806020000780006E1E5@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4F19A806020000780006E1E5@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jan Beulich Cc: "yuan.b.liu@intel.com" , "xen-devel@lists.xensource.com" , Eddie Dong List-Id: xen-devel@lists.xenproject.org On 20/01/12 16:44, Jan Beulich wrote: >>>> On 20.01.12 at 17:39, Andrew Cooper wrote: >> On 20/01/12 16:33, Jan Beulich wrote: >>> @@ -291,9 +285,22 @@ static int msixtbl_write(struct vcpu *v, >>> if ( !virt ) >>> goto out; >>> >>> + /* Do not allow the mask bit to be changed. */ >>> +#if 0 /* XXX >> You appear to still have some debugging in this patch. > No - that's why the comment is there. I wanted to keep the unused > code to make clear what ought to be taking place here. > > Jan Ah - that makes a little more sense. That was going to be my next query for clarification. I have some hardware at my disposal which can do SRIOV and PCI passthrough with MSI-X capable network cards. Any specific things you want testing, other than just a basic passthrough and verify the cards are working? ~Andrew >>> + * As the mask bit is the only defined bit in the word, and as the >>> + * host MSI-X code doesn't preserve the other bits anyway, doing >>> + * this is pointless. So for now just discard the write (also >>> + * saving us from having to determine the matching irq_desc). >>> + */ > > -- Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer T: +44 (0)1223 225 900, http://www.citrix.com