Re: [PATCH 3/9] pci-assign: Update MSI-X MMIO to Memory API

[Avi Kivity <avi@redhat.com>]

On 01/28/2012 04:21 PM, Alex Williamson wrote:
> Stop using compatibility mode and at the same time fix available
> access sizes.  The PCI spec indicates that the MSI-X table may
> only be accessed as DWORD or QWORD.
>
>  
>  static const MemoryRegionOps msix_mmio_ops = {
> -    .old_mmio = {
> -        .read = { msix_mmio_readb, msix_mmio_readw, msix_mmio_readl, },
> -        .write = { msix_mmio_writeb, msix_mmio_writew, msix_mmio_writel, },
> -    },
> +    .read = msix_mmio_read,
> +    .write = msix_mmio_write,
>      .endianness = DEVICE_NATIVE_ENDIAN,
> +    .impl = {
> +        .min_access_size = 4,
> +        .max_access_size = 8,
> +    },
>  };
>  

.impl.min_access_size = 4 means the core will convert 1-byte I/O to
4-byte I/O (using rmw if needed).  That's not what we want, I think you
can leave it at 1 and explicitly ignore small accesses in the callbacks.

Have you tested 8-byte I/O?  This is the first user.  Don't you need to
set .valid.max_access_size?


-- 
error compiling committee.c: too many arguments to function