From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:48017) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rspof-0003qa-2G for qemu-devel@nongnu.org; Thu, 02 Feb 2012 01:06:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rspod-00083i-Az for qemu-devel@nongnu.org; Thu, 02 Feb 2012 01:06:41 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:62374) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rspod-00082n-6t for qemu-devel@nongnu.org; Thu, 02 Feb 2012 01:06:39 -0500 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; charset=UTF-8; format=flowed Received: from euspt2 ([210.118.77.13]) by mailout3.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LYR00KBM4YX2X10@mailout3.w1.samsung.com> for qemu-devel@nongnu.org; Thu, 02 Feb 2012 06:06:33 +0000 (GMT) Received: from [106.109.8.162] by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LYR002EX4YV8M@spt2.w1.samsung.com> for qemu-devel@nongnu.org; Thu, 02 Feb 2012 06:06:33 +0000 (GMT) Date: Thu, 02 Feb 2012 10:06:31 +0400 From: Mitsyanko Igor In-reply-to: Message-id: <4F2A27E7.1070602@samsung.com> References: <1327909117-4542-1-git-send-email-e.voevodin@samsung.com> <1327909117-4542-6-git-send-email-e.voevodin@samsung.com> Subject: Re: [Qemu-devel] [PATCH v11 5/9] ARM: exynos4210: basic Power Management Unit implementation Reply-To: i.mitsyanko@samsung.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Evgeny Voevodin , qemu-devel@nongnu.org, kyungmin.park@samsung.com, d.solodkiy@samsung.com, m.kozlov@samsung.com, jehyung.lee@samsung.com On 02/01/2012 08:21 PM, Peter Maydell wrote: > On 30 January 2012 07:38, Evgeny Voevodin wrote: >> From: Maksim Kozlov >> >> Patch adds basic model for Exynos4210 SoC PMU. >> This model implements PMU registers just as a bulk of memory. Currently, >> the only reason this device exists is that secondary CPU boot loader >> uses PMU INFORM5 register as a holding pen. > > Your cover letter's changelog says > - hw/exynos4210_pmu.c: we do not waste space for non-existing registers > in PMU state anymore; non-existing registers are now RAZ/WI; > > ...wrong version of this patch, or is the cover letter wrong? > > -- PMM > > Cover letter is not wrong, when we send PMU patch for the first time (in V9 series), PMU memory was modelled as continious array of registers 0x3d0c bytes long, with every register being "read as written". This was wrong since PMU address space consists of only a handful of registers with big empty gaps between them. Starting from V10, PMU state includes only actually existing registers, and empty gaps between these registers behave as RAZ/WI. -- Mitsyanko Igor ASWG, Moscow R&D center, Samsung Electronics email: i.mitsyanko@samsung.com