Re: [PATCH v4] x86/AMD: Add support for AMD's OSVW feature in guests

[Boris Ostrovsky <boris.ostrovsky@amd.com>]

On 02/03/12 02:53, Jan Beulich wrote:
>>>> On 02.02.12 at 21:29, Boris Ostrovsky<boris.ostrovsky@amd.com>  wrote:
>> On 02/02/12 08:22, Jan Beulich wrote:
>>> As I was about to apply this to my local tree to give it a try, I had
>>> to realize that the microcode integration is still not correct: There
>>> is (at least from an abstract perspective) no guarantee for
>>> cpu_request_microcode() to be called on all CPUs, yet you want
>>> svm_host_osvw_init() to be re-run on all of them. If you choose
>>> to not deal with this in a formally correct way, it should be stated
>>> so in a code comment (to lower the risk of surprises when someone
>>> touches that code) that this is not possible in practice because
>>> collect_cpu_info() won't currently fail for CPUs of interest.
>>
>> What if svm_host_osvw_init() is called from collect_cpu_info()? There
>> may be cases when svm_host_osvw_init() is called multiple times for the
>> same cpu but that should be harmless (and the routine will be renamed to
>> svm_host_osvw_update()).
>
> Wouldn't that result in workaround bits that might get cleared with
> the pending microcode update to get (and remain) set, as they're
> being or-ed together over all invocations of the function after any
> svm_host_osvw_reset()?


I think that would be an OK but not optimal situation: more bits will 
end up being set than necessary, meaning that workarounds will need to 
be applied where they may not be required. But that should not affect 
correctness. I am not sure it's worth optimizing for this case since I 
think onlining a core while doing a microcode update is a rather 
uncommon occurrence.

What could have been a problem is the case when a core that's coming up 
has more bits set than other cores and doesn't get to go into 
cpu_request_microcode(). Since collect_cpu_info() is always invoked on 
the onlining path we will not miss a call into svm_host_osvw_init().


-boris