From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kenneth Graunke <kenneth@whitecape.org>
Subject: Re: [PATCH 3/4] drm/i915: gen7: work around a system
	hang on IVB
Date: Fri, 03 Feb 2012 16:50:04 -0800
Message-ID: <4F2C80BC.8060302@whitecape.org>
References: <1328300538-3472-1-git-send-email-eugeni.dodonov@intel.com>
	<1328300538-3472-4-git-send-email-eugeni.dodonov@intel.com>
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To: Eugeni Dodonov <eugeni.dodonov@intel.com>
Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On 02/03/2012 12:22 PM, Eugeni Dodonov wrote:
> This adds the workaround for WaCatErrorRejectionIssue which could result in a
> system hang..
>
> Signed-off-by: Eugeni Dodonov<eugeni.dodonov@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_reg.h      |    4 ++++
>   drivers/gpu/drm/i915/intel_display.c |    4 ++++
>   2 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 92274b1..4f25cd5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3035,6 +3035,10 @@
>   #define GEN7_L3_CHICKEN_MODE_REGISTER		0xB030
>   #define  GEN7_WA_L3_CHICKEN_MODE				0x20000000
>
> +/* WaCatErrorRejectionIssue */
> +#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG		0x9030
> +#define  GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB	(1<<11)
> +
>   /* PCH */
>
>   /* south display engine interrupt */
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 49e5870..f7e86b8 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8451,6 +8451,10 @@ static void gen6_init_clock_gating(struct drm_device *dev)
>   	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
>   			GEN7_WA_L3_CHICKEN_MODE);
>
> +	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
> +			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
> +			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
> +
>   	for_each_pipe(pipe) {
>   		I915_WRITE(DSPCNTR(pipe),
>   			   I915_READ(DSPCNTR(pipe)) |

Ditto: shouldn't this be in ivybridge_init_clock_gating?

This does match the docs (vol1g GT Interface Register [IVB] > GT 
Interface Register DevIVB > MBCunit Config Space > SQCM - SQ Chicken Modes).

Assuming it gets in a Gen7-specific location...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>