Re: [PATCH 1/2] i2c: tegra: Remove unnecessary clk_get

[Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>]

On Saturday 04 February 2012 05:40 AM, Stephen Warren wrote:
> From: Laxman Dewangan<ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> The clock table has just one entry for a given i2c controller.
> Hence, the second clk_get is not required in the driver.
>
> Originally by Laxman Dewangan<ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, but S-o-b is
> missing in our internal repo.
>
> [swarren: Reworded commit description, resolved merge issue when cherry-
> picking to mainline]
> Signed-off-by: Stephen Warren<swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The tegra i2c controller have two clock inputs i2c_div and i2c_fast_clk. 
There is way to select the clock source for i2c_div clock but 
i2c_fast_clk is fixed to PLLP_OUT3 clock source.
Both clocks are needed to proper functionality. This change assume that 
fast-clk (pllp_out3) is always be ON which is wrong assumption. For 
aggressive power management, if there is no client for pllp_out3, it 
will be turned off. And so this is require.
However, the code enable fast_clk always once it is registered which is 
also not correct. The div_clk and fast_clk should be enable together and 
diable together and so driver need to call the clk_enable(div_clk) and 
clk_enable(fast_clk) for enabling clock. We have fixed this in our 
internal tree (K3.1). Let me know if I can help here.