diff for duplicates of <4F3C5AAA.5040007@gmx.de> diff --git a/a/1.txt b/N1/1.txt index 0a2b0f6..cc42e28 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -270,7 +270,7 @@ Florian Tobias Schandinat > + struct i740fb_par *par = info->par; > + > + mutex_lock(&(par->open_lock)); -> + if (par->ref_count = 0) { +> + if (par->ref_count == 0) { > + printk(KERN_ERR "fb%d: release called with zero refcount\n", > + info->node); > + mutex_unlock(&(par->open_lock)); @@ -464,7 +464,8 @@ Florian Tobias Schandinat > + par->video_clk2_n = (n_best - 2) & 0xFF; > + par->video_clk2_mn_msbs = ((((n_best - 2) >> 4) & VCO_N_MSBS) > + | (((m_best - 2) >> 8) & VCO_M_MSBS)); -> + par->video_clk2_div_sel > + ((p_best << 4) | (d_best ? 4 : 0) | REF_DIV_1); +> + par->video_clk2_div_sel = +> + ((p_best << 4) | (d_best ? 4 : 0) | REF_DIV_1); > +} > + > +static int i740fb_decode_var(const struct fb_var_screeninfo *var, @@ -616,7 +617,8 @@ Florian Tobias Schandinat > + } > + > + /* disabled IRQ */ -> + par->crtc[VGA_CRTC_V_SYNC_END] > + ((yres + lower - 1 + vslen) & 0x0F) & ~0x10; +> + par->crtc[VGA_CRTC_V_SYNC_END] = +> + ((yres + lower - 1 + vslen) & 0x0F) & ~0x10; > + /* 0x7F for VGA, but some SVGA chips require all 8 bits to be set */ > + par->crtc[VGA_CRTC_V_BLANK_END] = (yres + lower - 1 + vslen) & 0xFF; > + @@ -665,7 +667,7 @@ Florian Tobias Schandinat > + break; > + case 15: /* 0rrrrrgg gggbbbbb */ > + case 16: /* rrrrrggg gggbbbbb */ -> + par->pixelpipe_cfg1 = (var->green.length = 6) ? +> + par->pixelpipe_cfg1 = (var->green.length == 6) ? > + DISPLAY_16BPP_MODE : DISPLAY_15BPP_MODE; > + par->crtc[VGA_CRTC_OFFSET] = vxres >> 2; > + par->ext_offset = vxres >> 10; @@ -691,7 +693,8 @@ Florian Tobias Schandinat > + > + par->crtc[VGA_CRTC_START_LO] = base & 0x000000FF; > + par->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8; -> + par->ext_start_addr > + ((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE; +> + par->ext_start_addr = +> + ((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE; > + par->ext_start_addr_hi = (base & 0x3FC00000) >> 22; > + > + par->pixelpipe_cfg0 = DAC_8_BIT; @@ -724,7 +727,8 @@ Florian Tobias Schandinat > + par->misc |= 0x0C; > + > + /* Calculate the FIFO Watermark and Burst Length. */ -> + par->lmi_fifo_watermark > + i740_calc_fifo(par, 1000000 / var->pixclock, bpp); +> + par->lmi_fifo_watermark = +> + i740_calc_fifo(par, 1000000 / var->pixclock, bpp); > + > + return 0; > +} @@ -921,8 +925,9 @@ Florian Tobias Schandinat > + mdelay(50); > + vga_unprotect(par); > + -> + info->fix.line_length > + info->var.xres_virtual * info->var.bits_per_pixel / 8; -> + if (info->var.bits_per_pixel = 8) +> + info->fix.line_length = +> + info->var.xres_virtual * info->var.bits_per_pixel / 8; +> + if (info->var.bits_per_pixel == 8) > + info->fix.visual = FB_VISUAL_PSEUDOCOLOR; > + else > + info->fix.visual = FB_VISUAL_TRUECOLOR; @@ -999,7 +1004,8 @@ Florian Tobias Schandinat > + par->crtc[VGA_CRTC_START_LO] = base & 0x000000FF; > + par->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8; > + par->ext_start_addr_hi = (base & 0x3FC00000) >> 22; -> + par->ext_start_addr > + ((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE; +> + par->ext_start_addr = +> + ((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE; > + > + i740outreg(par, VGA_CRT_IC, VGA_CRTC_START_LO, base & 0x000000FF); > + i740outreg(par, VGA_CRT_IC, VGA_CRTC_START_HI, @@ -1050,7 +1056,7 @@ Florian Tobias Schandinat > + i740outreg(par, XRX, DPMS_SYNC_SELECT, DPMSSyncSelect); > + > + /* Let fbcon do a soft blank for us */ -> + return (blank_mode = FB_BLANK_NORMAL) ? 1 : 0; +> + return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; > +} > + > +static struct fb_ops i740fb_ops = { @@ -1120,7 +1126,7 @@ Florian Tobias Schandinat > + > + /* detect memory size */ > + if ((i740inreg(par, XRX, DRAM_ROW_TYPE) & DRAM_ROW_1) -> + = DRAM_ROW_1_SDRAM) +> + == DRAM_ROW_1_SDRAM) > + i740outb(par, XRX, DRAM_ROW_BNDRY_1); > + else > + i740outb(par, XRX, DRAM_ROW_BNDRY_0); @@ -1141,7 +1147,7 @@ Florian Tobias Schandinat > + info->fix.smem_len = info->screen_size; > + info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; > + -> + if (i740fb_setup_ddc_bus(info) = 0) { +> + if (i740fb_setup_ddc_bus(info) == 0) { > + par->ddc_registered = true; > + edid = fb_ddc_read(&par->ddc_adapter); > + if (edid) { @@ -1177,7 +1183,7 @@ Florian Tobias Schandinat > + info->monspecs.modedb, > + info->monspecs.modedb_len, > + NULL, info->var.bits_per_pixel); -> + if (!ret || ret = 4) { +> + if (!ret || ret == 4) { > + dev_err(info->device, "mode %s not found\n", > + mode_option); > + ret = -EINVAL; @@ -1191,7 +1197,7 @@ Florian Tobias Schandinat > + info->var.yres_virtual = info->fix.smem_len * 8 / > + (info->var.bits_per_pixel * info->var.xres_virtual); > + -> + if (ret = -EINVAL) +> + if (ret == -EINVAL) > + goto err_find_mode; > + > + ret = fb_alloc_cmap(&info->cmap, 256, 0); @@ -1269,14 +1275,14 @@ Florian Tobias Schandinat > + struct i740fb_par *par = info->par; > + > + /* don't disable console during hibernation and wakeup from it */ -> + if (state.event = PM_EVENT_FREEZE || state.event = PM_EVENT_PRETHAW) +> + if (state.event == PM_EVENT_FREEZE || state.event == PM_EVENT_PRETHAW) > + return 0; > + > + console_lock(); > + mutex_lock(&(par->open_lock)); > + > + /* do nothing if framebuffer is not active */ -> + if (par->ref_count = 0) { +> + if (par->ref_count == 0) { > + mutex_unlock(&(par->open_lock)); > + console_unlock(); > + return 0; @@ -1302,7 +1308,7 @@ Florian Tobias Schandinat > + console_lock(); > + mutex_lock(&(par->open_lock)); > + -> + if (par->ref_count = 0) +> + if (par->ref_count == 0) > + goto fail; > + > + pci_set_power_state(dev, PCI_D0); diff --git a/a/content_digest b/N1/content_digest index 518b320..f5e33c2 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -281,7 +281,7 @@ "> +\tstruct i740fb_par *par = info->par;\n" "> +\n" "> +\tmutex_lock(&(par->open_lock));\n" - "> +\tif (par->ref_count = 0) {\n" + "> +\tif (par->ref_count == 0) {\n" "> +\t\tprintk(KERN_ERR \"fb%d: release called with zero refcount\\n\",\n" "> +\t\t\tinfo->node);\n" "> +\t\tmutex_unlock(&(par->open_lock));\n" @@ -475,7 +475,8 @@ "> +\tpar->video_clk2_n = (n_best - 2) & 0xFF;\n" "> +\tpar->video_clk2_mn_msbs = ((((n_best - 2) >> 4) & VCO_N_MSBS)\n" "> +\t\t\t\t | (((m_best - 2) >> 8) & VCO_M_MSBS));\n" - "> +\tpar->video_clk2_div_sel > +\t\t((p_best << 4) | (d_best ? 4 : 0) | REF_DIV_1);\n" + "> +\tpar->video_clk2_div_sel =\n" + "> +\t\t((p_best << 4) | (d_best ? 4 : 0) | REF_DIV_1);\n" "> +}\n" "> +\n" "> +static int i740fb_decode_var(const struct fb_var_screeninfo *var,\n" @@ -627,7 +628,8 @@ "> +\t}\n" "> +\n" "> +\t/* disabled IRQ */\n" - "> +\tpar->crtc[VGA_CRTC_V_SYNC_END] > +\t\t((yres + lower - 1 + vslen) & 0x0F) & ~0x10;\n" + "> +\tpar->crtc[VGA_CRTC_V_SYNC_END] =\n" + "> +\t\t((yres + lower - 1 + vslen) & 0x0F) & ~0x10;\n" "> +\t/* 0x7F for VGA, but some SVGA chips require all 8 bits to be set */\n" "> +\tpar->crtc[VGA_CRTC_V_BLANK_END] = (yres + lower - 1 + vslen) & 0xFF;\n" "> +\n" @@ -676,7 +678,7 @@ "> +\t\tbreak;\n" "> +\tcase 15: /* 0rrrrrgg gggbbbbb */\n" "> +\tcase 16: /* rrrrrggg gggbbbbb */\n" - "> +\t\tpar->pixelpipe_cfg1 = (var->green.length = 6) ?\n" + "> +\t\tpar->pixelpipe_cfg1 = (var->green.length == 6) ?\n" "> +\t\t\tDISPLAY_16BPP_MODE : DISPLAY_15BPP_MODE;\n" "> +\t\tpar->crtc[VGA_CRTC_OFFSET] = vxres >> 2;\n" "> +\t\tpar->ext_offset = vxres >> 10;\n" @@ -702,7 +704,8 @@ "> +\n" "> +\tpar->crtc[VGA_CRTC_START_LO] = base & 0x000000FF;\n" "> +\tpar->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8;\n" - "> +\tpar->ext_start_addr > +\t\t((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE;\n" + "> +\tpar->ext_start_addr =\n" + "> +\t\t((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE;\n" "> +\tpar->ext_start_addr_hi = (base & 0x3FC00000) >> 22;\n" "> +\n" "> +\tpar->pixelpipe_cfg0 = DAC_8_BIT;\n" @@ -735,7 +738,8 @@ "> +\tpar->misc |= 0x0C;\n" "> +\n" "> +\t/* Calculate the FIFO Watermark and Burst Length. */\n" - "> +\tpar->lmi_fifo_watermark > +\t\ti740_calc_fifo(par, 1000000 / var->pixclock, bpp);\n" + "> +\tpar->lmi_fifo_watermark =\n" + "> +\t\ti740_calc_fifo(par, 1000000 / var->pixclock, bpp);\n" "> +\n" "> +\treturn 0;\n" "> +}\n" @@ -932,8 +936,9 @@ "> +\tmdelay(50);\n" "> +\tvga_unprotect(par);\n" "> +\n" - "> +\tinfo->fix.line_length > +\t\t\tinfo->var.xres_virtual * info->var.bits_per_pixel / 8;\n" - "> +\tif (info->var.bits_per_pixel = 8)\n" + "> +\tinfo->fix.line_length =\n" + "> +\t\t\tinfo->var.xres_virtual * info->var.bits_per_pixel / 8;\n" + "> +\tif (info->var.bits_per_pixel == 8)\n" "> +\t\tinfo->fix.visual = FB_VISUAL_PSEUDOCOLOR;\n" "> +\telse\n" "> +\t\tinfo->fix.visual = FB_VISUAL_TRUECOLOR;\n" @@ -1010,7 +1015,8 @@ "> +\tpar->crtc[VGA_CRTC_START_LO] = base & 0x000000FF;\n" "> +\tpar->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8;\n" "> +\tpar->ext_start_addr_hi = (base & 0x3FC00000) >> 22;\n" - "> +\tpar->ext_start_addr > +\t\t\t((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE;\n" + "> +\tpar->ext_start_addr =\n" + "> +\t\t\t((base & 0x003F0000) >> 16) | EXT_START_ADDR_ENABLE;\n" "> +\n" "> +\ti740outreg(par, VGA_CRT_IC, VGA_CRTC_START_LO, base & 0x000000FF);\n" "> +\ti740outreg(par, VGA_CRT_IC, VGA_CRTC_START_HI,\n" @@ -1061,7 +1067,7 @@ "> +\ti740outreg(par, XRX, DPMS_SYNC_SELECT, DPMSSyncSelect);\n" "> +\n" "> +\t/* Let fbcon do a soft blank for us */\n" - "> +\treturn (blank_mode = FB_BLANK_NORMAL) ? 1 : 0;\n" + "> +\treturn (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;\n" "> +}\n" "> +\n" "> +static struct fb_ops i740fb_ops = {\n" @@ -1131,7 +1137,7 @@ "> +\n" "> +\t/* detect memory size */\n" "> +\tif ((i740inreg(par, XRX, DRAM_ROW_TYPE) & DRAM_ROW_1)\n" - "> +\t\t\t\t\t\t\t= DRAM_ROW_1_SDRAM)\n" + "> +\t\t\t\t\t\t\t== DRAM_ROW_1_SDRAM)\n" "> +\t\ti740outb(par, XRX, DRAM_ROW_BNDRY_1);\n" "> +\telse\n" "> +\t\ti740outb(par, XRX, DRAM_ROW_BNDRY_0);\n" @@ -1152,7 +1158,7 @@ "> +\tinfo->fix.smem_len = info->screen_size;\n" "> +\tinfo->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;\n" "> +\n" - "> +\tif (i740fb_setup_ddc_bus(info) = 0) {\n" + "> +\tif (i740fb_setup_ddc_bus(info) == 0) {\n" "> +\t\tpar->ddc_registered = true;\n" "> +\t\tedid = fb_ddc_read(&par->ddc_adapter);\n" "> +\t\tif (edid) {\n" @@ -1188,7 +1194,7 @@ "> +\t\t\t\t info->monspecs.modedb,\n" "> +\t\t\t\t info->monspecs.modedb_len,\n" "> +\t\t\t\t NULL, info->var.bits_per_pixel);\n" - "> +\t\tif (!ret || ret = 4) {\n" + "> +\t\tif (!ret || ret == 4) {\n" "> +\t\t\tdev_err(info->device, \"mode %s not found\\n\",\n" "> +\t\t\t\tmode_option);\n" "> +\t\t\tret = -EINVAL;\n" @@ -1202,7 +1208,7 @@ "> +\tinfo->var.yres_virtual = info->fix.smem_len * 8 /\n" "> +\t\t\t(info->var.bits_per_pixel * info->var.xres_virtual);\n" "> +\n" - "> +\tif (ret = -EINVAL)\n" + "> +\tif (ret == -EINVAL)\n" "> +\t\tgoto err_find_mode;\n" "> +\n" "> +\tret = fb_alloc_cmap(&info->cmap, 256, 0);\n" @@ -1280,14 +1286,14 @@ "> +\tstruct i740fb_par *par = info->par;\n" "> +\n" "> +\t/* don't disable console during hibernation and wakeup from it */\n" - "> +\tif (state.event = PM_EVENT_FREEZE || state.event = PM_EVENT_PRETHAW)\n" + "> +\tif (state.event == PM_EVENT_FREEZE || state.event == PM_EVENT_PRETHAW)\n" "> +\t\treturn 0;\n" "> +\n" "> +\tconsole_lock();\n" "> +\tmutex_lock(&(par->open_lock));\n" "> +\n" "> +\t/* do nothing if framebuffer is not active */\n" - "> +\tif (par->ref_count = 0) {\n" + "> +\tif (par->ref_count == 0) {\n" "> +\t\tmutex_unlock(&(par->open_lock));\n" "> +\t\tconsole_unlock();\n" "> +\t\treturn 0;\n" @@ -1313,7 +1319,7 @@ "> +\tconsole_lock();\n" "> +\tmutex_lock(&(par->open_lock));\n" "> +\n" - "> +\tif (par->ref_count = 0)\n" + "> +\tif (par->ref_count == 0)\n" "> +\t\tgoto fail;\n" "> +\n" "> +\tpci_set_power_state(dev, PCI_D0);\n" @@ -1724,4 +1730,4 @@ "> \n" > -4665b18d3cb5cbde330ef686e245782fc65fd4f43b250dfb4f86b053fb7ea2d1 +c0225d2fc42e4edf19c8fbda0a1baeda9775d2c0e7c0b0103380897be5fb1f11
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